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119 commits

Author SHA1 Message Date
Stefan Lankes
c3fbc90b9e switch (partly) from a Apache License to a BSD License 2011-08-08 23:32:34 +02:00
Stefan Lankes
452aa3b1d1 cosmetic changes and add some scheduling statistics 2011-08-03 19:37:05 +02:00
Stefan Lankes
d5bfc4f28c avoid races on SMP systems 
=> signalizes with a new flag, that a task switch is finished
 2011-08-01 22:01:39 +02:00
Stefan Lankes
a26f88c940 cosmetic changes 2011-07-31 19:17:42 +02:00
Stefan Lankes
ff8c37d68d use "real" atomic operations to set a value in atomic_t 2011-07-22 21:08:38 +02:00
Stefan Lankes
dd9ddbca46 add memory barrier 2011-07-21 19:15:48 +02:00
Stefan Lankes
ab37b024b0 simply the scheduler => move code from entry.asm to timer.c 2011-07-21 09:59:29 +02:00
Stefan Lankes
20c944b099 avoid a task migration during the calculation of the current task 
=> temporary clearing the IF flag
 2011-07-20 08:24:24 +02:00
Stefan Lankes
8e9accd6ed cosmetic changes 2011-07-19 09:58:40 +02:00
Stefan Lankes
d05ffcacac we use the same handler for exceptions and interrupts => interrupts has to push a virtual error code on the stack 2011-07-19 09:10:12 +02:00
Stefan Lankes
d203a070f4 add IPI support to flush the TLB on the other cores 2011-07-19 07:16:49 +02:00
Stefan Lankes
85768e6f58 fix bug in APIC code 
=> before we enable the interrupts,  we map the APIC registers
 2011-07-18 15:51:26 +02:00
Stefan Lankes
e595fae384 add SMP support 
- this is experimental version
- by setting MAX_CORES to 1, you are to disable the SMP support
 2011-07-18 09:14:28 +02:00
Stefan Lankes
36a8ed9e31 add helper functions for reading and writing CMOS entries 2011-07-18 09:06:09 +02:00
Stefan Lankes
18ce8eff11 some code cleanups 2011-07-15 09:22:31 +02:00
Stefan Lankes
e08f6a9d53 add UART support 2011-07-02 13:04:26 -07:00
Stefan Lankes
5cd3d7557a fine tuning to increase the performance of the mailbox example 2011-07-02 03:13:24 -07:00
Stefan Lankes
86b1d02945 remove obsolete lines 2011-06-30 12:11:58 -07:00
Stefan Lankes
e1d3ac2ec5 remove obsolete code & minor optimizations 2011-06-29 12:31:32 -07:00
Simon Pickartz
39b79506bf Merge branch 'master' of git.lfbs.rwth-aachen.de:metalsvm into mailbox_integration 2011-06-22 19:51:21 +02:00
Generic account for RWTHAachen Students
262e9f085a bug fix 2011-06-07 03:53:37 -07:00
Stefan Lankes
536e02892f Merge branch 'master' of git.lfbs.rwth-aachen.de:metalsvm into lwip 
Conflicts:
	lwip/src/include/lwipopts.h
 2011-06-06 13:20:31 -07:00
Generic account for RWTHAachen Students
521c3e1bc9 free allocated memory for iRCCE_MAIL_HEADER now; call iRCCE_finalize() in icc_halt() 2011-06-06 06:45:17 -07:00
Simon Pickartz
e59860dde3 add icc_mail_ping to icc.h 2011-05-31 04:57:55 -07:00
Simon Pickartz
75ed99db86 added mailbox-support 2011-05-31 10:45:22 +02:00
Jacek Galowicz
7fdb044e9a Encapsulated FPU restore instructions. 
There is a new procedure restore_fpu_state() in
arch/x86/include/asm/tasks_types.
Will need this code in lguest, too.
 2011-05-30 11:22:54 +02:00
Stefan Lankes
5d16090b76 map FPGA registers to the kernel space 2011-05-29 15:30:34 -07:00
Stefan Lankes
cdd16a2b9f add the SSE support 
=> context switch stores also the SSE registers
 2011-05-28 23:35:46 +02:00
Stefan Lankes
098546fe25 fix typo in the declaration of icc_ping 2011-05-17 08:11:41 -07:00
Stefan Lankes
3a0e42eef1 add ping pong test and some bug fixes in the ICC part 2011-04-24 07:27:27 -07:00
Stefan Lankes
29ab43f289 First steps to realize Inter-Core-Communication via RCCE 2011-04-23 00:13:12 -07:00
Stefan Lankes
7cb05d8f4a first version to support the FPU 
- seems to work
- currently, we didn't support SIMD instructions
 2011-04-21 07:32:10 +02:00
Stefan Lankes
d8ad0b8dce add space to store the FPU context 2011-04-21 07:31:46 +02:00
Jacek Galowicz
a9c4b5ddc0 Encapsulated IDT-/GDT-descriptor configuring code into helper functions. 2011-04-21 07:31:45 +02:00
Stefan Lankes
373d663fd0 add iRCCE code 2011-04-21 07:31:38 +02:00
Stefan Lankes
68564c3238 Merge branch 'tests' 
Conflicts:
	include/metalsvm/spinlock.h
	include/metalsvm/spinlock_types.h
	kernel/tasks.c
 2011-04-18 15:36:22 +02:00
Stefan Lankes
47f37e3b00 use memory barriers instead of read memory barriers to determine the current TSC 
=> more accurate caclculation of the timer frequency
+ minor cosmetic changes
 2011-04-18 15:07:45 +02:00
Jacek Galowicz
b9b7841dc3 Moved IDT related structs from idt.c to idt.h. 2011-04-15 15:08:41 +02:00
Stefan Lankes
02cf1d87f2 resolve some merge conflicts 2011-04-14 08:58:07 +02:00
Stefan Lankes
b5908af744 Merge branch 'master' of git.lfbs.rwth-aachen.de:metalsvm into doxygen 
Conflicts:
	.gitignore
	arch/x86/include/asm/apic.h
	arch/x86/include/asm/page.h
	arch/x86/include/asm/processor.h
	arch/x86/kernel/idt.c
 2011-04-14 08:40:52 +02:00
Stefan Lankes
eeb49cdb90 add the SCC support of a initial ramdisk 2011-04-13 11:03:34 -07:00
Stefan Lankes
ba1388c13d Merge branch 'master' of git.lfbs.rwth-aachen.de:metalsvm into rcce 2011-04-08 07:26:55 -07:00
Stefan Lankes
8868900e19 redesign of nested if flag handling 
=> only clearing and setting of the IF flag
 2011-04-08 16:02:28 +02:00
Stefan Lankes
030243f200 introduce the hlt instruction 2011-04-08 16:01:44 +02:00
Stefan Lankes
6b86f3c572 add the address of error status register 2011-04-08 16:01:36 +02:00
Stefan Lankes
683f8cca1e add macro to simplify the using of th hlt instruction 2011-04-06 05:38:44 -07:00
Stefan Lankes
f0e4a2b833 add the support of the memory type MPBT 
=> seesection "10.1.2 Internal Cache Changes" of SCC External Architecture Specification (R1.1)
 2011-04-05 23:43:44 -07:00
Stefan Lankes
e8abd6f336 minor improvements and cosmetic changes to increase the readability 2011-04-05 02:00:02 -07:00
Stefan Lankes
9918db81ec fix bugs in initialization of RCCE 
at first, we have to enable paging and to disable caching for the configuration registers
 2011-04-05 01:55:02 -07:00
Jacek Galowicz
f411498368 Commented another bunch of header files. 2011-04-04 18:12:08 +02:00