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645 commits

Author SHA1 Message Date
daniel-k
4d3e4dd931 ips: make irqs a list 2018-01-10 11:02:08 +01:00
daniel-k
79f37ce352 ips/switch: add C++ implementation of switch 2018-01-10 11:02:08 +01:00
daniel-k
12024d53e5 lib/ip-node: add IpNode class, IpCore which has streaming ports 2018-01-10 11:02:08 +01:00
daniel-k
f3f0f4d630 lib/ip: pass ip core by reference to factory instead of unique_ptr 2018-01-10 11:02:08 +01:00
daniel-k
9676a9535d lib/ip: re-add IRQ to IpCore 2018-01-10 11:02:08 +01:00
daniel-k
ab183d2111 lib/ip: flip output of IpIdentifier (name first, VLNV second) 2018-01-10 11:02:08 +01:00
daniel-k
c105f1c925 lib/ip: remove unused includes and replace pragma by include guard 2018-01-10 11:02:08 +01:00
daniel-k
a5b5e317d4 wip implementing dependency parsing and proper memeory handling
works and compiles so for. next is to implement different IP interfaces
(Model, Interface, DataMover, Infrastructure, ...)
2018-01-10 11:02:08 +01:00
daniel-k
6a721847e4 set C++ standard to C++17
Primarily for structured binding declaration in range-based for loops
2018-01-10 11:02:08 +01:00
daniel-k
61ca7aa44f fpga/ip: add C++ timer implementation 2018-01-10 11:02:08 +01:00
daniel-k
3d0afd671e lib/utils: add string tokenizer 2018-01-10 11:02:08 +01:00
daniel-k
35d96ed277 lib: add dependency graph implementation 2018-01-10 11:02:08 +01:00
daniel-k
e590d1a350 add namespace villas::fpga and villas::fpga::ip and some renaming 2018-01-10 11:02:08 +01:00
daniel-k
09815a661e rough implementation of a C++ style logger class
with many sharp edges :)
2018-01-10 11:02:08 +01:00
daniel-k
b0e55e6fb2 current wip implementing card, many changes in ip too 2018-01-10 11:02:08 +01:00
daniel-k
63a443527c plugin: treat empty name in lookup() as wildcard 2018-01-10 11:02:08 +01:00
daniel-k
2bf8bf93bd ips/intc: remove configureJson() method because not needed 2018-01-10 11:02:08 +01:00
daniel-k
a194f8d0b2 plugin: require name and add method to dump list 2018-01-10 11:02:08 +01:00
daniel-k
d63c2b30bf tests: compile main as C++ 2018-01-10 11:02:08 +01:00
daniel-k
7d883089c2 lib/card: copy C->C++ and just make it compile 2018-01-10 11:02:08 +01:00
daniel-k
68c9f08457 plugin: use Nifty Counter Idiom to intialize plugin list
Just using a standard std::list<> to hold plugins is problematic, because
we want to push Plugins to the list from within each Plugin's constructor
that is executed during static initialization. Since the order of static
initialization is undefined in C++, it may happen that a Plugin
constructor is executed before the list could be initialized. Therefore,
we use the Nifty Counter Idiom [1] to initialize the list ourself before
the first usage.

In short:
- allocate a buffer for the list
- initialize list before first usage
- (complicatedly) declaring a buffer is neccessary in order to avoid
  that the constructor of the static list is executed again
2018-01-10 11:02:08 +01:00
daniel-k
151abd2fd5 re-add old interrupt controller to make project compile again 2018-01-10 11:02:08 +01:00
daniel-k
e735c7e248 make linking of the lib work by using old C-symbols until replaced 2018-01-10 11:02:08 +01:00
daniel-k
5d4040aded first port to C++ of plugin and fpga ip infrastructure 2018-01-10 11:02:08 +01:00
daniel-k
f0c089f719 simple renames to not use reserved names 2018-01-10 11:02:08 +01:00
daniel-k
4adb889527 make ips/intc C++ 2018-01-10 11:02:08 +01:00
14150f158f fix CI 2017-12-29 15:48:04 +01:00
daniel-k
babec9a574 kernel/pci: fix pci device compare function
list_search's compare function has to return 0 on match.
2017-11-28 12:08:32 +01:00
daniel-k
eeafb2bcc6 etc/fpga: card is in slot 03:00.0 currently 2017-11-28 12:06:26 +01:00
daniel-k
737a5851df lib/card: start FPGA card prior to parsing
Initializing IPs may want to probe the actual hardware for feature
detection (e.g. DMA), so the card has to be started in order to access
any memory on the card.
2017-11-28 11:26:41 +01:00
daniel-k
d67a120902 tests/dma: fix chunk size for simple DMA (should have been 4k) 2017-11-22 19:47:04 +01:00
daniel-k
c67c8aac5b tests: add fpga.json and correctly parse it for unit tests 2017-11-22 19:46:07 +01:00
daniel-k
0bf00d51d7 lib: create shared instead of static library 2017-11-22 19:41:02 +01:00
daniel-k
1cde762fc0 ips/gpio: add skeleton for GPIO IP 2017-11-22 19:40:22 +01:00
daniel-k
db79fe4827 lib/pci: initialize list and ignore special dir entries 2017-11-22 11:21:27 +01:00
daniel-k
1fcabd1bdd lib/card: fix assignment in assertion 2017-11-22 11:20:44 +01:00
a5845eb397 add LAPACK dependency to Dockerfile 2017-11-21 23:06:42 +01:00
149139aa34 fix CI 2017-11-21 23:05:22 +01:00
668fa2eb78 use https submodules 2017-11-21 23:02:16 +01:00
a7c15e618c add missing benchmarks 2017-11-21 22:30:21 +01:00
8e0e7a4098 added gitignore 2017-11-21 21:33:50 +01:00
f95d65a45f added fodler for bitstreams 2017-11-21 21:33:19 +01:00
c3164e93ef imported source code from VILLASfpga repo and made it compile 2017-11-21 21:31:08 +01:00
01130e6fa4 added simple Dockerfile for development 2017-11-21 21:29:34 +01:00
a288295e43 created new repo for VILLASfpga 2017-11-21 21:28:21 +01:00