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037bfcb81e
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fix initialization errors
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2020-07-01 17:07:17 +02:00 |
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e21a08e290
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tests: fix unit tests
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2020-07-01 17:07:16 +02:00 |
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cdf1819def
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2020-07-01 17:07:16 +02:00 |
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747ce08684
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update VILLAScommon submodule
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2020-07-01 17:07:16 +02:00 |
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437d699aa8
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update VILLASfpga submodule
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2020-07-01 17:07:16 +02:00 |
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8c01a7914f
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config: and WIP version of env subsitution and include directives
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2020-07-01 17:07:16 +02:00 |
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a5bc8eb90f
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fpga: first compiling code of fpga support
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2020-07-01 17:07:16 +02:00 |
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f8850b4110
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refactor: improve code-style
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2020-07-01 17:07:16 +02:00 |
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e341b7c0dc
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fpga: update CMakeLists
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2020-07-01 17:07:16 +02:00 |
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942aff3c59
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cmake: several smaller improvements
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2020-07-01 17:07:15 +02:00 |
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f8d96ada55
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avoid unnecessary includes
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2020-07-01 17:07:15 +02:00 |
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96c55711da
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plugin: use new plugin code from VILLAScommon
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2020-07-01 17:07:15 +02:00 |
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0ed67d6b2d
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fpga: add libxil to deps.sh
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2020-07-01 17:07:15 +02:00 |
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8cec6edeef
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fpga: add submodule
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2020-07-01 17:07:15 +02:00 |
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44fc7ccfb3
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common: fix submodule url
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2020-07-01 17:07:15 +02:00 |
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5859364ad1
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cmake: add rt lib to interface libraries
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2020-07-01 14:36:18 +02:00 |
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c4fe7e4b07
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update libxil submodule
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2020-06-15 22:49:43 +02:00 |
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ba9d670d4b
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cmake: make unit-tests optional
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2020-06-15 22:49:19 +02:00 |
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e3cfc26673
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Merge branch 'refactoring' into 'master'
Refactoring
See merge request acs/public/villas/fpga/fpga!11
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2020-06-15 22:12:35 +02:00 |
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7e2365bfa0
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ci: update CI config
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2020-06-15 22:09:18 +02:00 |
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031311ba95
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docker: add missing deps
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2020-06-15 21:45:50 +02:00 |
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a935a5856a
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docker: add mising ssl headers
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2020-06-15 21:29:46 +02:00 |
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2700493f2f
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docker: fix location of FEIN e.V. repo
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2020-06-15 21:25:55 +02:00 |
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c5e3d3dd4a
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node: add connect() with reverse path
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2020-06-15 21:21:16 +02:00 |
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6c225c8fae
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update VILLAScommon submodule
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2020-06-15 21:21:05 +02:00 |
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74f55fa98c
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refactor: more code-style improvements
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2020-06-15 21:08:49 +02:00 |
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cc456b6525
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refactor: no namespace scopes in source files
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2020-06-14 22:12:41 +02:00 |
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d938bd95b1
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cmake: fixups for inclusion into VILLASnode
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2020-06-14 22:11:58 +02:00 |
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a9f9dc4a37
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refactor: no namespace scoeps in source files
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2020-06-14 22:11:26 +02:00 |
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8b7bbe27c6
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refactor: whitespaces for references
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2020-06-14 22:03:50 +02:00 |
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e86a291dfd
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update VILLAScommon submodule
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2020-06-12 00:08:04 +02:00 |
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6b3164dd26
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refactor IpNode and IpCore class names
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2020-06-12 00:05:03 +02:00 |
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7c92a30ab4
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several cleanups and bugfixes
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2020-06-11 23:55:05 +02:00 |
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bb8a711f02
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use new getter for graph
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2020-06-11 23:40:12 +02:00 |
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1af96b20e4
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pipe: use correct DMA instance
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2020-06-11 19:02:49 +02:00 |
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b7e5bfead2
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harmonize codestyle
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2020-06-11 18:38:46 +02:00 |
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3f1ab8e862
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use new vlnv id for aurora_axis
|
2020-06-11 18:19:28 +02:00 |
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77b55f65f7
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use new plugin mechanism
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2020-06-11 18:19:03 +02:00 |
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91f9000038
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unit-tests: allow FPGA configuration to provided via env var
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2020-06-11 16:09:58 +02:00 |
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cc1d1d4298
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plugin: fix lookup
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2020-06-11 16:01:42 +02:00 |
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86f8997b05
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gpio: add new IP for AXI programmable GPIO
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2020-06-11 15:58:02 +02:00 |
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d5b1012b75
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intc: fix name of register space
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2020-06-11 15:57:05 +02:00 |
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6882e9d418
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harmonize code-style with VILLAScommon/node
|
2020-06-11 14:26:38 +02:00 |
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c906116d86
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update to latest VILLAScommon submodule
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2020-06-11 14:20:33 +02:00 |
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3b28eea7d2
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aurora_axis: add two functions to reset counters and configure loopback mode
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2020-06-11 13:08:42 +02:00 |
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1596208bb6
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aurora_axis: dump frame counters
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2020-06-11 13:01:44 +02:00 |
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3d15323376
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aurora_axis: harmonize with HDL changes
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2020-06-11 13:01:27 +02:00 |
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bab9e22fdb
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update submodule urls
|
2020-06-11 12:37:53 +02:00 |
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e077285d98
|
update VILLAScommon submodule
|
2020-06-08 04:03:18 +02:00 |
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daeb0820ee
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smaller bug fixes
|
2020-06-08 04:03:07 +02:00 |
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