Pascal Bauer
83e95f88a5
Refactor: change namespace pci to devices
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2024-08-30 12:23:02 +02:00
Pascal Bauer
c41f91f1ca
refactor: rename DeviceList to PciDeviceList
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2024-08-30 12:23:02 +02:00
Niklas Eiling
f25e1dd689
log: fix undefined intitialization order of static objects. fixes #799 .
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-08-05 14:57:13 +02:00
dc436073a2
Use spaces for indention of C++ comments
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 23:18:47 +01:00
4b36073711
Use spaces for indention of CMake files
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 23:18:47 +01:00
3d73c759ea
Reformat all code with clang-format
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:34:27 +01:00
29cf5540a0
Fix some compiler warnings in fpga code
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:33:40 +01:00
Niklas Eiling
2967fb8ac9
fix fpga.cpp unit test failing due to changed DeviceList interface
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-12 14:08:34 +01:00
Steffen Vogel
157d5b21d7
Make REUSE copyright notice the same as in other VILLASframework projects and fix comments ( #82 )
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This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework.
* Harmonize comment and code-style
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
* Harmonize comment and code-style
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
---------
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
2023-09-08 11:35:18 +02:00
Niklas Eiling
d9993409e0
fix possible NULL dereferencing in villasfpga_dma.c
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-21 14:56:54 +01:00
Niklas Eiling
1d9ccd6c05
add license note to villasfpga_dma.c
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-21 11:59:22 +01:00
Niklas Eiling
9d4cd5384d
clean up debuggin output and fix scanf usage in villasfpga_dma.c
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-21 11:52:36 +01:00
Niklas Eiling
c05ae4d282
add C bindings for DMA interactions and add a test/example
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-21 10:47:45 +01:00
Niklas Eiling
590cef10d0
add check for missed interrupts when handling reads
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introduce new struct Completion that is returned by Dma::readCompletion
and Dma::writeCompletion
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:12:16 +01:00
Niklas Eiling
14f924b6c5
rework MemoryBlock use to make use of shared_ptr so the lifetime of the objects is properly tracked
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this fixes that the wrong order of allocating and PciCard destruction
causes an undefined state.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:09:09 +01:00
Pascal Henry Bauer
3587ccc0fa
change pciecard name to pcie_card
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Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
6b87c9bc30
refactor to use pcie card (Legacy)
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Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
63f3463b54
fix attribution to Daniel
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-09 08:08:40 +01:00
1c6779287b
remove old Doxygen comments
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:33:54 +01:00
9b27c31b9c
fixup copyright texts
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:32:48 +01:00
f776cba693
relicense project to Apache 2.0
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The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
eff0f2e83f
fix RTDS IP unit test
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-05 14:21:20 +01:00
Pascal Bauer
3840fa1fa6
removed unnecessary closing bracket
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
Pascal Bauer
0644f1310d
removed empty brackets
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
dee5b2d81f
update Steffens mail address
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-14 17:44:17 +01:00
92ab5d078f
remove aliases for smart pointers and lists
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-07 19:04:47 +01:00
Niklas Eiling
1fecb66fb3
bump common subrepo and use shared pointers for vfio::Container
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-05 09:31:37 +01:00
Niklas Eiling
74ad0783f6
bump common subrepo and use new interface
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-02 13:52:32 +01:00
7e0848b7d5
dma: throw exception in makeAccesibleFromVA instead of returning bool
2022-10-28 08:16:58 -04:00
0e0197a3be
fix coding style
2022-10-28 08:03:57 -04:00
7ccb23d8b4
remove old C code
2022-10-28 02:18:21 -04:00
9ef01d068e
update year in copyright notices
2022-08-30 12:22:40 -04:00
fb824a82f9
cleanup of comments
2022-08-30 12:21:46 -04:00
bcec3efd5f
update code to latest common submodule
2022-08-30 12:21:45 -04:00
8a99307ba2
update config include
2022-03-04 03:33:27 -05:00
a04c1d7abf
ci: add cppcheck
2020-09-21 09:37:10 +02:00
10b8878279
fix naming of factories
2020-07-08 15:10:26 +02:00
ba9d670d4b
cmake: make unit-tests optional
2020-06-15 22:49:19 +02:00
6c225c8fae
update VILLAScommon submodule
2020-06-15 21:21:05 +02:00
d938bd95b1
cmake: fixups for inclusion into VILLASnode
2020-06-14 22:11:58 +02:00
8b7bbe27c6
refactor: whitespaces for references
2020-06-14 22:03:50 +02:00
6b3164dd26
refactor IpNode and IpCore class names
2020-06-12 00:05:03 +02:00
7c92a30ab4
several cleanups and bugfixes
2020-06-11 23:55:05 +02:00
bb8a711f02
use new getter for graph
2020-06-11 23:40:12 +02:00
b7e5bfead2
harmonize codestyle
2020-06-11 18:38:46 +02:00
91f9000038
unit-tests: allow FPGA configuration to provided via env var
2020-06-11 16:09:58 +02:00
cc1d1d4298
plugin: fix lookup
2020-06-11 16:01:42 +02:00
c906116d86
update to latest VILLAScommon submodule
2020-06-11 14:20:33 +02:00
Hatim Kanchwala
bf74db8e79
Debug update
2019-06-24 12:11:44 -04:00
3f119896e9
ci: some tweaks to fix unit-tests
2018-08-21 15:29:37 +02:00
