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644 commits

Author SHA1 Message Date
Niklas Eiling
6a900ba5e4 fix villas-fpga-cat interpreting floats wrong 2022-11-29 14:51:54 +01:00
Niklas Eiling
f105b08144 clean up and comment ips/dma.cpp 2022-11-29 14:51:53 +01:00
Niklas Eiling
34c8458500 villas-fpga-cat: fix double value being constructed wrong 2022-11-29 14:51:53 +01:00
Niklas Eiling
0c6c30dda3 ips/dma: comment debug outputs to improve villas-fpga-cat performance
fix rebase artifacts
2022-11-29 14:51:53 +01:00
Niklas Eiling
fb48e36a0b add villas-fpga-cat app that outputs a stream of data 2022-11-29 14:51:53 +01:00
Niklas Eiling
e029963839 move helper functions from villas-fpga-pipe into separate file 2022-11-29 14:51:53 +01:00
Niklas Eiling
2ffd15989f fix image reference in gitlab.yml 2022-11-17 15:49:10 +01:00
Niklas Eiling
791ece434b migrate dockerfile to rocky9 2022-11-17 14:40:10 +01:00
ba16653820 minor code-style fixes 2022-11-11 05:03:43 -05:00
Niklas Eiling
e4a469f99f ips/dma: fix hasScatterGather using wrong member variable; Throw error used on unconfigured Dma 2022-11-11 04:53:58 -05:00
Niklas Eiling
49db359851 ips: fix some formatting issues 2022-11-11 04:53:58 -05:00
Niklas Eiling
dfb2a967d8 ips/dma: use NodeFactory's configureJson to setup memory graph 2022-11-11 04:53:58 -05:00
Niklas Eiling
7b4176a710 ips/dma: use json_unpack 2022-11-11 04:53:58 -05:00
Niklas Eiling
bac0b7309a add card config option "polling" to configure polling mode in IP cores; add json parsing of hwdef to dma IP core to replace hardcoded DMA settings. 2022-11-11 04:53:58 -05:00
Niklas Eiling
7b2f0f3d96 ip/dma: fix spelling 2022-11-11 04:53:58 -05:00
Niklas Eiling
5acf4f96e9 ips/dma: acknowledge interrupts in DMA controller and correctly set coalescing parameter. 2022-11-11 04:53:58 -05:00
Niklas Eiling
da483d8d3a make dma.cpp use interrupts instead of polling 2022-11-11 04:53:58 -05:00
5060f07067 move VILLASnode configs to VILLASnode repo 2022-11-11 03:16:04 -05:00
e82234c93e update VILLAScommon submodule 2022-11-11 03:13:29 -05:00
5fc556523c add libxil as a submodule 2022-11-11 03:12:53 -05:00
228d929840 updated VILLAScommon submodule 2022-10-28 11:42:12 -04:00
2a068ec3a6 core: avoid reversing initialization order list 2022-10-28 11:32:18 -04:00
3f8a38adce dma: first successful test with scatter gather
(Aurora IPs still broken?)
2022-10-28 11:32:01 -04:00
dbf25a6d8e adapt villas-fpga-pipe to new DMA code 2022-10-28 08:19:00 -04:00
7be3b049c7 update IPs config for new bitstream using MSI IRQs 2022-10-28 08:18:47 -04:00
0dfffb94c4 dma: added second version of scatter-gather support 2022-10-28 08:18:24 -04:00
2f7107753a update gitignore 2022-10-28 08:17:58 -04:00
ab3cb2303b minor code style and comment fixes 2022-10-28 08:17:26 -04:00
7e0848b7d5 dma: throw exception in makeAccesibleFromVA instead of returning bool 2022-10-28 08:16:58 -04:00
ab994f2c87 fix script to reset PCIe card 2022-10-28 08:08:30 -04:00
add8dad95b remove useless includes 2022-10-28 08:06:57 -04:00
894460cd7b intc: fix VLNV for Niklas' new bistream 2022-10-28 08:05:48 -04:00
2d21432a5f aurora: fix names of AXI-S interfaces 2022-10-28 08:05:30 -04:00
0e0197a3be fix coding style 2022-10-28 08:03:57 -04:00
7ccb23d8b4 remove old C code 2022-10-28 02:18:21 -04:00
72cfade589 dma: start implementing scatter-gather support 2022-10-27 06:02:45 -04:00
26231dc78c add example config for VILLASnode integration 2022-10-27 06:02:20 -04:00
2ad5fc1ccf remove broken symlink 2022-10-27 06:01:55 -04:00
80abbb866b add latest vc707 config 2022-10-27 06:01:42 -04:00
b37388a143 remove last pieces of hardware submodule 2022-10-13 03:38:39 -04:00
7ceffa642b bump libxil version requirement 2022-09-13 03:31:38 -04:00
60df06113e villas-fpga-pipe: whitespaces and syntax fixes 2022-09-13 03:25:48 -04:00
0a93da7bad adjust DMA IP core to new DMA parameters of Niklas' bitstream 2022-09-13 03:25:17 -04:00
161a9e349f update VILLAScommon submodule 2022-08-30 12:22:40 -04:00
d6c7e69866 add missing parentheses 2022-08-30 12:22:40 -04:00
9ef01d068e update year in copyright notices 2022-08-30 12:22:40 -04:00
c7180e729a fixes for villas-fpga-pipe 2022-08-30 12:22:36 -04:00
fb824a82f9 cleanup of comments 2022-08-30 12:21:46 -04:00
5c68a22ffe add new IP core for standard Xilinx Aurora cores 2022-08-30 12:21:46 -04:00
8a6832edc3 card: allow loading IPs devicetree from extra file 2022-08-30 12:21:46 -04:00