Commit graph

426 commits

Author SHA1 Message Date
Davorin Mista
a25049cb0d PMUFW: PM: Adjusting PM function return values to use XStatus type
-Using int type for returns
-Error statuses are common Xilinx XST_* codes
-Additional power management status errors are defined in pm_defs.h

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
2015-07-31 16:55:19 +05:30
Mirela Simonovic
8703e57a32 PMUFW: PM: pm_proc: added RPU0..1 processor's sleep (reset assert)
Added reset assert for RPU0..1 processor's sleep functions.
Reset assert is done by directly writing into crl_apb registers,
becase pmu-rom does not expose function for only asserting reset.
Reset assert is a must in order to stop processor from executing
instructions once it's sleep handler gets executed.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
2015-07-31 16:55:17 +05:30
Mirela Simonovic
13e22f9eb0 PMUFW: PM: pm_master: Added default requirements, set upon entering active state
-Added default requirements field in PmRequirements structure
-Added notification of master when primary processor switches from
 forced powerdown to active state. Master has to make sure that all
 default requirements gets set before primary processor enters active
 state.
-In PmMasterNotify, changed behavior when wake event is received:
 if primary processor is in sleep state, everything works as before,
 if primary processor is in forced powerdown, default requirements
 are requested and configured
-In PmRequirementReleaseAll added a check is master using slave and
 if yes, usage flag and requirements are cleared
-Added PmRequirementRequestDefault function called before primary
 processor switches from forced powerdown to active. Function
 automatically requests all default requirements which are later
 configured by PmRequirementUpdateScheduled
-In PmRequirementUpdateScheduled when swapping requirements added
 a check whether master has default requirements. If yes, default
 reqs are saved as next reqs instead of current. Default requirements
 have priority over current requirement. Example: RPU0 keeps boot code
 in one TCM bank and when booted, during the runtime, it keeps that
 bank in retention. For this bank RPU0 should have default requirements
 = on state, and when it boots up it can request retention. If default
 requirements wouldn't exist, it would have to request for boot bank to
 switch from retention to on before calling self suspend, just to get
 on state in scheduled reqs

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:16 +05:30
Mirela Simonovic
2ff64bf7a9 PMUFW: PM: pm_slave: added debug prints when slave state changes
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:15 +05:30
Mirela Simonovic
85705895d7 PMUFW: PM: pm_slave: PmUpdateSlave rewritten to always try to update slave state.
Before, there was a check at the very beginning to see if current state
is having exact required capabilities. However, state should be checked
for having all required capabilities and not for having exact required
caps. Also, even when state have all required capabilities, there could
be state with lower power that still has all required capabilities.
Code is changed to implement above claims.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:14 +05:30
Davorin Mista
e3bb1821b7 PMUFW: PM: Removed action arrays, added one enterState for slave FSM
-Removed action arrays and instId pointers used in PmSlaveFsm
-Removed unused macros and typedefs
-Removed redundant functions for Sram retention entry/exit
-Added enterState function in PmSlaveFsm. Slave state is entered
 based on arguments (slave pointer and next state).
-Added xpbr function pointers in PmSlave derived objects (usb and sram)

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Reviewed-by: Jyotheeswar Reddy <jyothee@xilinx.com>
2015-07-31 16:55:13 +05:30
Soren Brinkmann
b24bb9228d PMUFW: PM: Remove _g suffix from static variables
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:11 +05:30
Davorin Mista
34df243f1d PMUFW: PM: EnableProxyWake: Check first whether proc is sleeping
We should only enable the scheduled wake-up sources in the GIC Proxy
if the processor is sleeping.

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Reviewed-by: Jyotheeswar Reddy <jyothee@xilinx.com>
2015-07-31 16:55:10 +05:30
Davorin Mista
0e9de73072 PMUFW: PM: Cleanup
improve comments and messages; remove unused code/structures

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:08 +05:30
Davorin Mista
b8db439393 PMUFW: PM: Minor MISRA compliance fixes
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:06 +05:30
Davorin Mista
b380c07463 PMUFW: PM: Prefix PmDbg prints with function name
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:05 +05:30
Soren Brinkmann
20c80ed9ad PMUFW: scheduler: Fix print format string
A print format string had a typo in the conversion specifier.

Fixes: ae1b22f628eeae491136205dd99cac745bad5b54 "Scheduler: Add Scheduler files"
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Jyotheeswar Reddy <jyothee@xilinx.com>
2015-07-31 16:55:03 +05:30
Soren Brinkmann
6941dfdcdc PMUFW: ROM interface: Add ROM hook table
Reserve the area in RAM that the ROM expects the extension hook table to
be in. Also provide a definition for the table in a header so FW can insert
entries easily, if needed.

Cc: Kristopher Bechamp <kristop@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Jyotheeswar Reddy <jyothee@xilinx.com>
2015-07-31 16:55:03 +05:30
Nava kishore Manne
e35699808d Update Tcl files to support MultiBd and Packaged Bd Designs
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
2015-07-31 16:55:01 +05:30
Sarat Chand Savitala
5b9d1a3f61 sw_apps:zynq_fsbl: Updated release version to 2015.3
Updated release version from 2015.2 to 2015.3

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
2015-07-31 16:54:58 +05:30
Sarat Chand Savitala
077e879e61 sw_apps:zynqmp_fsbl: Changed location of handoff for PMU FW
PMU FW if present, is now handed off immediately after its load and validation.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:54:45 +05:30
Sarat Chand Savitala
f513b80c1e sw_apps:zynqmp_fsbl: Added early handoff support
Support added to handoff to R5 applications after thery are loaded.
This feature can be turned ON by using conditional switch.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:54:44 +05:30
P L Sai Krishna
f3f817d7e9 xilffs: Modified the file size to test on emulation platform.
This patch modifies the file size as 8KB to test on emulation
platform. Since 8MB in emulation platform taking long time,
reduced file size to 8KB.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:54:43 +05:30
Kinjal Pravinbhai Patel
6e145b38ae bsp: r5: change in makefile for compiler check
Modified cortexr5/gcc/Makefile to keep a correct check of a compiler
to update ECC_FLAGS correctly.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:54:41 +05:30
Kinjal Pravinbhai Patel
2645d56b26 bsp: a9: chnage in gcc makefile for compiler check
Modified cortexa9/gcc/Makefile to keep a correct check of a compiler
to update ECC_FLAGS to fix a bug introduced during new version creation
of BSP

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:54:40 +05:30
Kinjal Pravinbhai Patel
363baf34d9 bsp: a53: xil_settlbattributes modified for addresses > 4GB
This patch modifies xil_settlbattributes API to work with
addresses > 4GB by modifying the address masking value
appropriate for higher addresses lies beyond 4GB

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:54:39 +05:30
Harini Katakam
f85e3a62b3 lwip_echo_server: Add support for Zynq Ultrascale MPSoC
Add a separate platform file for Zynq Ultrascale MPSoC using the
respective timer and driver functions. The platform selection is
based on the processor recognized in the tcl file.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:54:13 +05:30
Harini Katakam
1cb1e03722 lwip_echo_server: Add detection of A53 and R5 in tcl
Add support for recognizing processor A53 or R5 to work for
Zynq Ultrascale MPSoC

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:54:04 +05:30
Harini Katakam
f406b72805 xilffs: Modify makefile to check for IAR compiler
Modify makefile to check for IAR compiler to use --create and
remove individual checks for all other compilers.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-23 12:34:26 +05:30
P L Sai Krishna
0a1c15f45c xilffs: Card detection checked after disk status.
This patch does card detection check before disk
status call, since BaseAddress and card detect
variables will be assigned in disk_status API.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-17 20:32:25 +05:30
Sarat Chand Savitala
2f7303ed76 sw_apps:zynqmp_fsbl: Load address configuration in DDR for PL
Changed the location of temporary ddr address definition.
This address is for storing PL bitstream temporarily.
User can change this address till support is provided in bootgen
(for load address configuration for PL).

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-17 20:20:58 +05:30
Sarat Chand Savitala
487abcb1b4 sw_apps:zynqmp_fsbl: Power up check added for power islands
Added checks to power up power islands, if required, before first access.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-17 20:20:29 +05:30
Kinjal Pravinbhai Patel
a4ce0fd772 bsp: a53: changed the makefile to take compiler name from cpu tcl
This patch modifies the makefile for a53 to take the compiler and
archiver name from cpu tcl rather than fixing them.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-07-14 10:51:59 +05:30
Kinjal Pravinbhai Patel
9a266b1159 bsp: r5: changed the makefile to take compiler name from cpu tcl
This patch modifies the makefile for r5 to take the compiler and
archiver name from cpu tcl rather than fixing them.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-07-14 10:51:58 +05:30
Kinjal Pravinbhai Patel
a09427a546 bsp: a53: added 64bit print support in xil_printf
This patch modifies xil_printf to add support for 64bit
pointer value print in case of 64bit mode. It adds support
to print 64 bit value for long integer and long hex.
It also removes unknown specifier 'D'.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-07-14 10:19:00 +05:30
Nava kishore Manne
904528b4bd lib:sw_apps:get_cells is changed to ::hsi::get_cells
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-07-13 17:38:07 +05:30
P L Sai Krishna
b7134896b7 xilskey: Changed supported peripheral name to ps7_cortexa9.
This patch modifies the supported peripheral name
to ps7_cortexa9.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-09 19:47:17 +05:30
P L Sai Krishna
c54a28c510 xilrsa: Changed Support peripheral name to ps7_cortexa9.
This patch changes the supported peripheral name to
ps7_cortexa9.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-09 19:47:17 +05:30
P L Sai Krishna
71589358e1 xilffs: Added support for SD1.
This patch add support for SD1.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-09 19:33:51 +05:30
P L Sai Krishna
380282ca43 xilffs: Removed Change Bus Speed, Clock API's in glue layer.
This patch removes Change Bus Speed, Clock Freq, SelectCard
API's in glue layer since driver is taking care of those
things.

Signed-off-by: Srinivas Goud <sgoud@xilinx.com>
2015-07-09 19:33:50 +05:30
Nava kishore Manne
c635f10c8f Syncing ESW zynq_fsbl with HEAD zynq_fsbl 2015-07-09 18:56:17 +05:30
Nava kishore Manne
ce10360848 Revert "sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53"
This reverts commit 6713239caf3a66e29826de88ef0638ca39c0628c.
2015-07-06 23:45:58 +05:30
Naga Sureshkumar Relli
0a7fcbc746 xilflash_v4_1: Added Pass/Fail string to readwrite_example.
This patch adds Pass/Fail string to xilflash_readwrite_example.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
2015-07-06 11:49:25 +05:30
Bhavik Ameta
a2f0af55aa sw_services:xilsecure: Windows build issue fixed
Makefile has been corrected to fix the build issue on Windows

Signed-off-by: Bhavik Ameta <bameta@xilinx.com>
2015-07-06 10:48:30 +05:30
Sarat Chand Savitala
64e5e95917 sw_apps:zynqmp_fsbl: Fix in ATF handoff parameters for destination CPU
This fix populates the correct A53 CPU to which FSBL has to
hand off when partition is ATF.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:08 +05:30
Sarat Chand Savitala
0133313ae5 sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53
This enables saving of some OCM space for FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:06 +05:30
Sarat Chand Savitala
9083a0a512 sw_apps:zynqmp_fsbl: Fix to avoid conflict with ATF Handoff parameters location
This fix stores FSBL's ATF Handoff parameters at fixed address towards
end of OCM so that ATF can avoid conflict with its sections.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:05 +05:30
Nava kishore Manne
04f120953b Revert "bsp: xil_printf: Specify attribute(format)"
This reverts commit 91606d4ae07a49dd5422b5e3bf2ed7a477296263.
2015-07-06 10:20:05 +05:30
P L Sai Krishna
42f46f2ddb xilffs: Added notes in the example.
This patch add notes in the example.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-02 17:22:51 +05:30
P L Sai Krishna
cfc2e87b18 zynqmp_fsbl: Added read only option and enabled it.
This patch add read only option and enabled it in mss
file for the Zynqmp fsbl.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-02 17:22:51 +05:30
P L Sai Krishna
d2fc5aa4ab xilffs: Added Read_Only option.
This patch modifies .mld and .tcl files to provide the
Read_Only option to the user. By default this option
is false.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-02 17:22:50 +05:30
P L Sai Krishna
746db5f257 xilffs: Removed compilation errors,added ReadOnly option.
This patch removes compilation errors in xilffs library.
This errors are coming when we configure ReadOnly, use
StringFunctions and use LFN options. This patch also does
configuring _FS_READONLY macro based on the option given
by the user.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-02 17:22:50 +05:30
Sarat Chand Savitala
58e0fb3ac2 sw_apps:zynqmp_fsbl: Updated reset release sequence for A53
Clock enable is now done before release of reset for A53.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-01 11:57:44 +05:30
Sarat Chand Savitala
1f87f492b1 sw_apps:zynqmp_fsbl: Updated bin file naming scheme for SD
For SD and eMMC, BIN filenames now follow convention BOOTXXXX.BIN.
FSBL now updated as per this change.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-01 11:57:43 +05:30
Nava kishore Manne
0ce98191e9 Revert "bsp: a53: added support for 64bit print in xil_printf"
This reverts commit 546c719e6729eb90daea3027269373542b198668.
2015-07-01 11:41:06 +05:30