The remote read/write functions serve as a wrapper in case the target RX device
is directly connected to the TX (link count total is equal to 1).
These functions may be called instead of the read/write GUID functions doing the
same thing.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Some monitors don't support sideband messages with AUX reads greater than 16
bytes. This improvement breaks up the higher-level read/write request into
multiple reads/writes that work with up to 16 bytes in size.
These higher-level remote DPCD read/write functions also serve as a wrapper for
an AUX read/write in case that the link count total is equal to 1 (a read/write
request to the RX device directly connected to the TX (not "remote")).
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
- Changed the offset from type u8 to u16.
- In order to accomodate offsets greater than 255, a segment pointer is used.
- The I2C read funciton is now able to access blocks other than the
block 0 and 1 at a given address. E.g., EDID extension blocks may now be
accessed by reading from I2C address 0x50 (raw=0xA0/0xA1) and writing
the appropriate segment pointer and offset.
- Input offset=0.
- EDID block 0: I2C read on offset=0 and segptr=0.
- Input offset=128.
- EDID block 1: I2C read on offset=128 and segptr=0.
- Input offset=256.
- EDID block 2: I2C read on offset=0 and segptr=1.
- Input offset=384.
- EDID block 3: I2C read on offset=128 and segptr=1.
- etc.
- Writing to the I2C address 0x30 (raw=0x60/0x61) sets the segment
pointer.
- Writing to an I2C address sets the offset that will be read from that
address. E.g., a read of the EDID, starting at offset 128 would be done
by writing 128 to 0x50, then reading from 0x50.
- Offsets that cross a 256-byte boundary requiring increment of the
segment pointer is also handled. E.g. A 16 byte read on input offset 500
results in the the returned 16 byte array having the first 11 bytes from
segptr=1 (bytes 244-255) and the last 5 bytes from segptr=2 (bytes 0-4).
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This patch fixes the xilkernel_thread_demo app compilation error
when microblaze is configured with mmu(C_USE_MMU) greater than one.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
This Patch modifies the TimeOut Register value,although timeout interrupt is not used, this register is changed to set to the maximum allowed HW timeout value.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch fixes the compilation errors when
axi-ethernet is present in the PL and when user try to generate
echo server application.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
This patch fixes the issues related to SGMII/1000BASEX phy
that is connected to GEM or axi ethernet on zynq.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
This patch fixes the issue exporting proper
values to the xparameters.h file when the PCS/PMA core is configured
in 1000BASE-X mode.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
This patch adds support for exporting SGMII/1000BASE-X
properties to xparameters.h file when the pcs/pma core is present in
the h/w design.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
An LCR (link count remaining) value of 6 is used to protect against loops.
If the LCR isn't processed at each node and attempted to be broadcasted on all
ports, waiting for a reply, a loop in the topology will result in the broadcast
message being forwarded infinitely.
Because of this, an LCR of 0 will prevent the message from being forwarded to
subsequent DP nodes.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This patch removes the multiple initialisations for readbuffer in eeprom interrupt and polled examples.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Fill Transmit Fifo before address register when sending and replaced DATA_INTR_DEPTH macro with FIFO_DEPTH macro.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch fixes the issue incorrect freq value being exported to
the xparameters.h file when uart is configured with external clock.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
If mulitple uart instances present in the h/w design and when
try to run periphreal test for those design results failure for
the second instance of ip. This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
This patch uses pin number in bank rather than pin number passed to APIs and changed the mask value.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
- Reduced lines of code that weren't part of the minimal set required for MST
streams to appear on the monitors.
- By default, don't use delays for AUX or sideband messaging.
- Added a final check to make sure that the link hasn't been lost. If it was
lost, re-train and try the programming sequence again.
- Added some additional comments to example code.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
It was observed that in MST mode, some of the sideband message were failing
due to the first check not showing a connected device.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Increased waiting for a response to a sideband message before timing out.
Reduced number of reads to check that the RX device received an ACT event.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Changes to the API in v2_0:
- XDptx_FindAccessibleDpDevices returns u32 now instead of void previously.
- Added a wrapper function: u32 XDptx_DiscoverTopology(XDptx *InstancePtr);
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
The MCAP interface enables an embedded microprocessor, such as MicroBlaze,
to read and write the FPGA configuration memory.
This library allows user to access the MCAP i/f.
Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
This patch modifies translation table entries in armcc/translation_table.s and
iccarm/translation_table.s to fix the compilation error
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
