Commit graph

45 commits

Author SHA1 Message Date
Nava kishore Manne
e35699808d Update Tcl files to support MultiBd and Packaged Bd Designs
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
2015-07-31 16:55:01 +05:30
Sarat Chand Savitala
077e879e61 sw_apps:zynqmp_fsbl: Changed location of handoff for PMU FW
PMU FW if present, is now handed off immediately after its load and validation.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:54:45 +05:30
Sarat Chand Savitala
f513b80c1e sw_apps:zynqmp_fsbl: Added early handoff support
Support added to handoff to R5 applications after thery are loaded.
This feature can be turned ON by using conditional switch.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:54:44 +05:30
Sarat Chand Savitala
2f7303ed76 sw_apps:zynqmp_fsbl: Load address configuration in DDR for PL
Changed the location of temporary ddr address definition.
This address is for storing PL bitstream temporarily.
User can change this address till support is provided in bootgen
(for load address configuration for PL).

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-17 20:20:58 +05:30
Sarat Chand Savitala
487abcb1b4 sw_apps:zynqmp_fsbl: Power up check added for power islands
Added checks to power up power islands, if required, before first access.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-17 20:20:29 +05:30
Nava kishore Manne
904528b4bd lib:sw_apps:get_cells is changed to ::hsi::get_cells
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-07-13 17:38:07 +05:30
Nava kishore Manne
ce10360848 Revert "sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53"
This reverts commit 6713239caf3a66e29826de88ef0638ca39c0628c.
2015-07-06 23:45:58 +05:30
Sarat Chand Savitala
64e5e95917 sw_apps:zynqmp_fsbl: Fix in ATF handoff parameters for destination CPU
This fix populates the correct A53 CPU to which FSBL has to
hand off when partition is ATF.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:08 +05:30
Sarat Chand Savitala
0133313ae5 sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53
This enables saving of some OCM space for FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:06 +05:30
Sarat Chand Savitala
9083a0a512 sw_apps:zynqmp_fsbl: Fix to avoid conflict with ATF Handoff parameters location
This fix stores FSBL's ATF Handoff parameters at fixed address towards
end of OCM so that ATF can avoid conflict with its sections.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:05 +05:30
P L Sai Krishna
cfc2e87b18 zynqmp_fsbl: Added read only option and enabled it.
This patch add read only option and enabled it in mss
file for the Zynqmp fsbl.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-02 17:22:51 +05:30
Sarat Chand Savitala
58e0fb3ac2 sw_apps:zynqmp_fsbl: Updated reset release sequence for A53
Clock enable is now done before release of reset for A53.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-01 11:57:44 +05:30
Sarat Chand Savitala
1f87f492b1 sw_apps:zynqmp_fsbl: Updated bin file naming scheme for SD
For SD and eMMC, BIN filenames now follow convention BOOTXXXX.BIN.
FSBL now updated as per this change.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-01 11:57:43 +05:30
Sarat Chand Savitala
3b07202f16 sw_apps:zynqmp_fsbl: Added PL bitstream support
PL bitstream download support added.
Both secure and non-secure bitstreams are supported.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-20 13:08:13 +05:30
Sarat Chand Savitala
fd800dfb46 sw_apps:zynqmp_fsbl: Removed redundant calls to Xil_DCacheFlush()
Xil_DCacheDisable() function internally has call to Xil_DCacheFlush().
Hence removing redundant calls to Xil_DCacheFlush from FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-10 20:36:58 +05:30
Sarat Chand Savitala
4766bcb9f6 sw_apps:zynqmp_fsbl: Registering exception handlers
Exception handlers are now registered unconditionally for both A53 and R5
Removed enabling of IRQ from FSBL(to be enabled in user application)

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-10 20:36:57 +05:30
Sarat Chand Savitala
83eaa550d6 sw_apps:zynqmp_fsbl: Updated release version to 2015.3
Updated release version from 2015.1 SW Beta2 to 2015.3

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-10 20:36:56 +05:30
Nava kishore Manne
1726f14574 lib:sw_apps:standalone drivers license changes
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-05-16 14:37:24 +05:30
Sarat Chand Savitala
2374e5de1c sw_apps:zynqmp_fsbl: xilsecure library selection by default
While creating new FSBL+BSP project, made xilsecure library
to be selected by default. This avoids compilation errors
when FSBL project is created.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-05-14 07:55:03 +05:30
Sarat Chand Savitala
d7d271eb97 sw_apps:zynqmp_fsbl: Fix to make decryption work when authentication disabled
When authentication of partitions is not enabled, decryption is failing.
This patch fixes this issue.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-05-05 23:29:41 +05:30
Sarat Chand Savitala
380e426371 sw_apps:zynqmp_fsbl: Changes in FSBL as per the current xilsecure library
This patch does the changes in FSBL to match the signature changes of
few functions in xilsecure library.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-04-27 17:37:44 +05:30
Sarat Chand Savitala
91f8d3bf88 sw_apps:zynqmp_fsbl: Added support for image decryption
Support for decryption of images added.
Authentication and decryption now use secure library APIs.
csu dma driver APIs are used now.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-04-22 11:50:09 +05:30
Sarat Chand Savitala
1e8599957a sw_apps:zynqmp_fsbl: Changes in FSBL to sync HEAD with beta2 branch
These changes were present in master-sdk-beta2 and also need to be
applied to master as well.
Changes done are:
- Macro name change in QSPI for PSU naming change
- Workaround for QEMU in QSPI32 dummy mode

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-04-16 15:31:05 +05:30
Sarat Chand Savitala
de365de89b sw_apps:zynqmp_fsbl: Check for supported OS platform
This patch adds call to check the supported OS platform when
application is Zynq MP FSBL.
This enables correct error message to be displayed when trying
to create FSBL project with OS platform other than Standalone.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-04-06 21:23:06 +05:30
Sarat Chand Savitala
f43d267e1b sw_apps:zynqmp_fsbl: Made compiler optimization configurable with HSI
Removing compiler optimization level and debug level flags from FSBL tcl file.
These flags can be passed on as arguments while compiling using make.
O2 optimization will be required while building FSBL to reduce the
size of FSBL and hence to accomodate ATF in OCM.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-04-02 10:53:55 +05:30
Sarat Chand Savitala
4f84389e6c sw_apps:zynqmp_fsbl: Flash load address for SD
For file system based devices, flash offset address
(location of image) should be independednt of multiboot
and should always be 0.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-26 21:40:07 +05:30
Peter Crosthwaite
f325b4c8d8 fsbl qspi: Fix dummy mode in examples
QSPI HW doesn't actually care what the SPI mode is for the dummy phase
of flash commands. We have confirmed this with randomized testing.
However due to a core limitation of QEMU it is expected to match the
mode of the address phase for QEMU.

So since QEMU is the only platform that cares, set the dummy mode to
QEMUs expectation.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2015-03-25 12:56:43 +05:30
Sarat Chand Savitala
dde36d829d sw_apps:zynqmp_fsbl: Added ATF handoff params and PMU FW download support
Provided support to pass handoff parameters to ATF
which it will use to load further partitions.
Provided support to load PMU firmware from FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-24 23:03:50 +05:30
Sarat Chand Savitala
e3aad72bc2 sw_apps:zynqmp_fsbl: disable cache during ECC initialization
Disabling cache ensures proper initialization of ECC

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-21 20:50:12 +05:30
Srinivas Goud
f0f16cc511 sw_apps:zynqmp_fsbl: Added GQSPI driver changes
Added GQSPI driver changes for
QSPI 24Bit and 32Bit boot modes
Added 32Bit boot mode

Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com>
2015-03-13 18:01:44 +05:30
Sarat Chand Savitala
370b4827f2 sw_apps:zynqmp_fsbl: Removed unnecessary files and set compiler options
Made changes in FSBL tcl file so that unnecessary files are deleted
from build. Since HSI and SDK create their own Makefile,
static Makefile is also removed from build. Also based on CPU,
compiler optins are set to match to those set in SDK.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-12 23:30:19 +05:30
Sarat Chand Savitala
990cca15db sw_apps:zynqmp_fsbl: Added eMMC bootmode support in FSBL
eMMC uses same driver as SD.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-12 18:15:25 +05:30
Peter Crosthwaite
9efeaa8f17 zynq_fsbl: Auto-populate -mcpu argument
FSBL has R5 specific behaviours so -mcpu must be passed to the build.
Automatically do this on app generation.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2015-03-12 18:06:09 +05:30
Sarat Chand Savitala
4f2925975f sw_apps:zynqmp_fsbl: Added fallback and multiboot functionality
Adding this feature in FSBL enables BootROM to search for
next available image in the boot devices. Also user can
jump to a different image with the help of multiboot.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-12 10:25:11 +05:30
Sarat Chand Savitala
918e66a41a sw_apps:zynqmp_fsbl: Added power on reset bit fields
While releasing resets, power on reset bit fields of
the corresponding CPU core also considered now.
These bit fields are added in RST_FPD_APU register from RTL 5.0.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-03-11 14:33:53 +05:30
Sarat Chand Savitala
208a4977d0 sw_apps:zynqmp_fsbl: Fix to address change in arguments to f_mount
Signature for function f_mount() is changed.
Now three arguments are expected (earlier had two arguments).
In FSBL code, now f_mount() is called with new set of arguments.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-27 18:05:23 +05:30
Sarat Chand Savitala
c402428673 sw_apps:zynqmp_fsbl: Removed the RTL version reference
All the references to the RTL version are removed in the FSBL code.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-26 15:03:05 +05:30
Sarat Chand Savitala
58335dabbd sw_apps:zynqmp_fsbl: Removed PMU Firmware file from FSBL
HSI API is now also generating PMU configuration source file
which is not needed in FSBL. Hence deleting it.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-26 14:33:37 +05:30
Sarat Chand Savitala
c719cebbac sw_apps:zynqmp_fsbl: Change in FSBL banner
FSBL banner is changed and is displayed independent of debug level

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-23 14:48:35 +05:30
Sarat Chand Savitala
52e9d348e4 sw_apps:zynqmp_fsbl: Changes in naming for psu
Changes done to replace all ps8 and pss references to psu.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-18 19:57:13 +05:30
Sarat Chand Savitala
4a0709ace1 sw_apps:zynqmp_fsbl: Update SD boot mode
Changed the SD (SD0) boot mode as per bootmode pin encoding from 5 to 3.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-17 21:26:03 +05:30
Sarat Chand Savitala
8b1c93702d sw_apps:zynqmp_fsbl: Changes in FSBL to match register changes
This change is done to match the change in the hardware registers
used to enable the RSA authentication during boot.
Also a small logical error is corrected.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-17 21:26:03 +05:30
Sarat Chand Savitala
b6aa8be915 sw_apps:zynqmp_fsbl: Change to copy ps init files in FSBL
This change is to handle the PS init files copying.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-02-17 21:26:03 +05:30
Kishore Kumar Korathaluri
6024205aba zynqmp_fsbl : added common namespace to all common tcl commands.
Signed-off-by: Kishore Kumar Korathaluri <kkorath@xilinx.com>
2015-01-22 11:52:54 +05:30
Sarat Chand Savitala
e5bc1ff112 sw_apps:zynqmp_fsbl: Publishing zynqmp FSBL to HEAD of embeddedsw
Initial publishing of zynqmp_fsbl in the embeddedsw repo.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-01-08 09:01:51 +05:30