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37 commits

Author SHA1 Message Date
Pascal Bauer
38e1199b28 Refactor: change namespace pci to devices
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2024-08-29 16:57:07 +02:00
Pascal Bauer
df8c26c79d refactor: rename DeviceList to PciDeviceList
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2024-08-29 16:57:07 +02:00
Niklas Eiling
f25e1dd689 log: fix undefined intitialization order of static objects. fixes #799.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-08-05 14:57:13 +02:00
936830d484 Remove unused includes and variables
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-03-27 17:22:07 +01:00
3d73c759ea Reformat all code with clang-format
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:34:27 +01:00
Steffen Vogel
157d5b21d7 Make REUSE copyright notice the same as in other VILLASframework projects and fix comments (#82)
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework.

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

---------

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
2023-09-08 11:35:18 +02:00
Niklas Eiling
e6f34f83f4 make villas-fpga-pipe use separat memory segments for reading and writing
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-20 12:10:37 +01:00
Niklas Eiling
6b58624e57 fix villas-fpga-pipe
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-03-15 16:11:44 +01:00
94cf3583d8 fix naming of fpgaHelper file
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-09 08:11:35 +01:00
9b27c31b9c fixup copyright texts
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:32:48 +01:00
f776cba693 relicense project to Apache 2.0
The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66

Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
92ab5d078f remove aliases for smart pointers and lists
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-07 19:04:47 +01:00
Niklas Eiling
e029963839 move helper functions from villas-fpga-pipe into separate file 2022-11-29 14:51:53 +01:00
3f8a38adce dma: first successful test with scatter gather
(Aurora IPs still broken?)
2022-10-28 11:32:01 -04:00
dbf25a6d8e adapt villas-fpga-pipe to new DMA code 2022-10-28 08:19:00 -04:00
0e0197a3be fix coding style 2022-10-28 08:03:57 -04:00
60df06113e villas-fpga-pipe: whitespaces and syntax fixes 2022-09-13 03:25:48 -04:00
9ef01d068e update year in copyright notices 2022-08-30 12:22:40 -04:00
c7180e729a fixes for villas-fpga-pipe 2022-08-30 12:22:36 -04:00
7e3a58ce2e update gitignore 2022-08-30 16:36:01 +02:00
49572d0a74 adapt to new plugin registry 2022-03-04 03:33:07 -05:00
10b8878279 fix naming of factories 2020-07-08 15:10:26 +02:00
6c225c8fae update VILLAScommon submodule 2020-06-15 21:21:05 +02:00
8b7bbe27c6 refactor: whitespaces for references 2020-06-14 22:03:50 +02:00
6b3164dd26 refactor IpNode and IpCore class names 2020-06-12 00:05:03 +02:00
7c92a30ab4 several cleanups and bugfixes 2020-06-11 23:55:05 +02:00
bb8a711f02 use new getter for graph 2020-06-11 23:40:12 +02:00
1af96b20e4 pipe: use correct DMA instance 2020-06-11 19:02:49 +02:00
b7e5bfead2 harmonize codestyle 2020-06-11 18:38:46 +02:00
3f1ab8e862 use new vlnv id for aurora_axis 2020-06-11 18:19:28 +02:00
cc1d1d4298 plugin: fix lookup 2020-06-11 16:01:42 +02:00
c906116d86 update to latest VILLAScommon submodule 2020-06-11 14:20:33 +02:00
Hatim Kanchwala
bf67a2e5f0 Add initial Aurora driver 2020-06-02 00:54:31 +02:00
30dff972f2 several fixes for villas-fpga-pipe 2019-08-15 13:55:39 +02:00
Hatim Kanchwala
bf74db8e79 Debug update 2019-06-24 12:11:44 -04:00
d191a86c18 do not call copy-ctor of villas::HostRamAllocator 2018-08-21 14:25:42 +02:00
5c7f167617 pipe: rename streamer to pipe (closes #19) 2018-08-21 13:40:38 +02:00
Renamed from fpga/src/streamer.cpp (Browse further)