ea5ab4ed5d
fix broken CMakeLists
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-09 11:21:05 +01:00
94cf3583d8
fix naming of fpgaHelper file
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-09 08:11:35 +01:00
9b27c31b9c
fixup copyright texts
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:32:48 +01:00
f776cba693
relicense project to Apache 2.0
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The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
Niklas Eiling
4785146a4c
fix villas-fpga-cat and villas-fpga-xbar-select scripts to use villas-fpga-ctrl
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-05 12:30:36 +01:00
Niklas Eiling
a818bc0b64
combine functionalities of binaries into a single one
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combine what was previously achieved by the separate binaries
villas-fpga-xbar-select and villas-fpga-cat into a single new
binary villas-fpga-ctl. Here we can select crossbar connections
via command line parameters. To avoid regression there are shell
scripts providing the old functionalities directly.
Currently the villas-fpga-pipe functionality is not supported,
because we still need to implement stdin input and routing that
to the fpga.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-04 17:16:35 +01:00
Pascal Bauer
56dcf9fac6
add comment to suppress casting warning
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
Pascal Bauer
1c85a4330f
cast voidpointer to uint for arithmetik
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
Pascal Bauer
6a8acc467b
changed casting from intmax to uintmax
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:35 +01:00
92ab5d078f
remove aliases for smart pointers and lists
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-07 19:04:47 +01:00
Niklas Eiling
404bc9c8be
fix throwing an error in villas-fpga-cat leading to abort, because of wrong deconstructor order
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-03 15:16:24 +01:00
Niklas Eiling
f26656a90d
bump common subrepo, use debug logging in villas-fpga-cat
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-02 13:52:32 +01:00
Niklas Eiling
0d0aae090d
add villas-fpga-xbar-select; improve DMA parameters in ips/dma
2022-11-29 14:51:54 +01:00
Niklas Eiling
6a900ba5e4
fix villas-fpga-cat interpreting floats wrong
2022-11-29 14:51:54 +01:00
Niklas Eiling
f105b08144
clean up and comment ips/dma.cpp
2022-11-29 14:51:53 +01:00
Niklas Eiling
34c8458500
villas-fpga-cat: fix double value being constructed wrong
2022-11-29 14:51:53 +01:00
Niklas Eiling
fb48e36a0b
add villas-fpga-cat app that outputs a stream of data
2022-11-29 14:51:53 +01:00
Niklas Eiling
e029963839
move helper functions from villas-fpga-pipe into separate file
2022-11-29 14:51:53 +01:00
3f8a38adce
dma: first successful test with scatter gather
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(Aurora IPs still broken?)
2022-10-28 11:32:01 -04:00
dbf25a6d8e
adapt villas-fpga-pipe to new DMA code
2022-10-28 08:19:00 -04:00
0e0197a3be
fix coding style
2022-10-28 08:03:57 -04:00
7ccb23d8b4
remove old C code
2022-10-28 02:18:21 -04:00
60df06113e
villas-fpga-pipe: whitespaces and syntax fixes
2022-09-13 03:25:48 -04:00
9ef01d068e
update year in copyright notices
2022-08-30 12:22:40 -04:00
c7180e729a
fixes for villas-fpga-pipe
2022-08-30 12:22:36 -04:00
fb824a82f9
cleanup of comments
2022-08-30 12:21:46 -04:00
7e3a58ce2e
update gitignore
2022-08-30 16:36:01 +02:00
c90b1c1f3e
fix format strings
2022-03-04 03:33:47 -05:00
49572d0a74
adapt to new plugin registry
2022-03-04 03:33:07 -05:00
10b8878279
fix naming of factories
2020-07-08 15:10:26 +02:00
6c225c8fae
update VILLAScommon submodule
2020-06-15 21:21:05 +02:00
8b7bbe27c6
refactor: whitespaces for references
2020-06-14 22:03:50 +02:00
6b3164dd26
refactor IpNode and IpCore class names
2020-06-12 00:05:03 +02:00
7c92a30ab4
several cleanups and bugfixes
2020-06-11 23:55:05 +02:00
bb8a711f02
use new getter for graph
2020-06-11 23:40:12 +02:00
1af96b20e4
pipe: use correct DMA instance
2020-06-11 19:02:49 +02:00
b7e5bfead2
harmonize codestyle
2020-06-11 18:38:46 +02:00
3f1ab8e862
use new vlnv id for aurora_axis
2020-06-11 18:19:28 +02:00
cc1d1d4298
plugin: fix lookup
2020-06-11 16:01:42 +02:00
c906116d86
update to latest VILLAScommon submodule
2020-06-11 14:20:33 +02:00
Hatim Kanchwala
bf67a2e5f0
Add initial Aurora driver
2020-06-02 00:54:31 +02:00
30dff972f2
several fixes for villas-fpga-pipe
2019-08-15 13:55:39 +02:00
Hatim Kanchwala
bf74db8e79
Debug update
2019-06-24 12:11:44 -04:00
d191a86c18
do not call copy-ctor of villas::HostRamAllocator
2018-08-21 14:25:42 +02:00
5c7f167617
pipe: rename streamer to pipe ( closes #19 )
2018-08-21 13:40:38 +02:00
f8de9425fe
streamer: use new memory api
2018-08-21 11:10:09 +02:00
7409d2024d
add more copyright / license headers
2018-06-25 17:03:09 +02:00
fb6a7178b7
add pcimem.c
2018-06-25 16:01:38 +02:00
7fd6599ea6
update copyright years
2018-06-25 15:33:14 +02:00
Daniel Krebs
31c854f26f
src: add streamer application for RTDS
2018-06-04 14:20:06 +02:00
