Commit graph

73 commits

Author SHA1 Message Date
Sarat Chand Savitala
816e90b214 sw_apps:zynqmp_fsbl: Fix for issue with SD1 boot when design has no SD0
This patch deduces correct drive number for SD based on which
SD instance(s) are in design and the boot mode used.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-10-29 22:03:32 +05:30
Sarat Chand Savitala
08f242df8b sw_apps:zynqmp_fsbl: Skip power-up requests for QEMU
QEMU doesn't model PMU in signle arch. Since, in FSBL,
it couldn't be determined if QEMU is of single or
multi arch, for now skipping power-up request for both cases.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-10-22 23:06:07 +05:30
RamyaSree
33124005bd sw_apps:zynqmp_fsbl: Corrected the ReadBuffer index value
This patch points to the correct readbuffer index value
in SendBankSelect API, when bank register read command
is issued for a SPANSION device in 24-bit mode.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Acked-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-10-20 17:40:49 +05:30
RamyaSree
d29d6bdcd0 sw_apps:zynqmp_fsbl: Modified PMU Trigger logic
This patch corrects the logic used to trigger PMU_0 IPI.
Also added code to Enable PMU_0 IPI.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Acked-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-10-16 19:47:46 +05:30
Sarat Chand Savitala
f6f21678a4 sw_apps:zynqmp_fsbl: Added support for SD1 and SD1 with level shifter bootmodes
This patch adds support for SD1 and SD1 with level shifter bootmodes in FSBL

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-10-09 08:52:58 +05:30
Sarat Chand Savitala
5ed1c08082 sw_apps:zynqmp_fsbl: Removed UART initialization workaround in FSBL
UART initialization is now done correctly in psu_init file for emulation platforms.
Hence removing the workaround. Also, this workaround should not be present for
Silicon.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-10-09 08:51:34 +05:30
Sarat Chand Savitala
be737a95f5 sw_apps:zynqmp_fsbl: Added print for Silicon platform
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-10-09 08:50:09 +05:30
Sarat Chand Savitala
0fb011dcd9 sw_apps:zynqmp_fsbl: Power state not to be checked before sending powering up request
Currently power state of island is checked before giving corresponding power up
request. This fix removes this check as this condition is false at reset and
leading to the corresponding power up request not being sent.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-10-09 08:48:22 +05:30
Sarat Chand Savitala
b5d70fa084 sw_apps:zynqmp_fsbl: Added tcl procedures to validate processor and os
tcl procedures are added to facilitate validating the FSBL supported processor(s)
and os platform.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
2015-10-08 19:21:54 +05:30
Sarat Chand Savitala
9b2ec2375f sw_apps:zynqmp_fsbl: Updated release version to 2015.4
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
2015-09-28 10:17:06 +05:30
Sarat Chand Savitala
ceb7c06ab2 sw_apps:zynqmp_fsbl: Disable early handoff by default
Currently R5 applications are handedoff immediately after they are loaded.
This feature is configurable in FSBL and now with this change, early handoff
is disabled by default. User can enable this feature again by defining
FSBL_EARLY_HANDOFF_EXCLUDE_VAL as 1.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-25 18:07:54 +05:30
Sarat Chand Savitala
5b3ea5f28f sw_apps:zynqmp_fsbl: Removed unnecessary file in sources
FSBL Tcl file changed to remove unnecessary file from build.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-17 09:09:35 +05:30
Sarat Chand Savitala
4fb856ad83 sw_apps:zynqmp_fsbl: Disabled debug prints in FSBL
Except banner all prints are disabled in FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-17 09:09:25 +05:30
Sarat Chand Savitala
71d7769303 sw_apps:zynqmp_fsbl: Change of invalid load address value for PL bitstream
When load address is not mentioned for PL bitstream, bootgen now makes this
as 0xFFFFFFFF to indicate it is invalid. Hence, FSBL uses default address to
load bitstream when load address from bootgen is 0xFFFFFFFF.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-17 09:09:03 +05:30
Sarat Chand Savitala
fe3cd5aba2 sw_apps:zynqmp_fsbl: Corrected compiler flags for R5
Currently for R5, compiler flag for, floating-point ABI is mentioned
as "softfp". This causes abort on encountering floating point arithmetic
operation. Hence changing this flag to "soft".

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-12 20:27:48 +05:30
Sarat Chand Savitala
1b1368305f sw_apps:zynqmp_fsbl: Fix to handle invalid cluster id
Added check to detect invalid cluster id and throw error accordingly.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-10 16:47:18 +05:30
Sarat Chand Savitala
22f0a46409 sw_apps:zynqmp_fsbl: Added explicit namespaces for HSI commands in tcl
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-10 16:46:56 +05:30
Sarat Chand Savitala
f5f3b0a518 sw_apps:zynqmp_fsbl: Fix to include compiler flags in FSBL tcl
This fix enables the compiler flags specified in HSI command line
to be appended to those specified in FSBL tcl file.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-10 16:46:38 +05:30
Sarat Chand Savitala
272bff49fb sw_apps:zynqmp_fsbl: Code changes done to avoid warnings
Warnings generated during compiling FSBL sources are addressed.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-10 16:45:58 +05:30
Sarat Chand Savitala
61bd977834 sw_apps:zynqmp_fsbl: Corrected the logic used to determinte A53 Execution state
Execution state of A53 (64-bit/32-bit) is now determined based on __aarch64__ value

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-07 16:01:05 +05:30
Sarat Chand Savitala
84204047c7 sw_apps:zynqmp_fsbl: Added A53 32-bit support in FSBL
This patch adds support for FSBL running in A53 32-bit mode and
also supports handing off to A53 32-bit applications from FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-06 15:33:14 +05:30
Nava kishore Manne
7a47ffd9e8 Removed executable file permission from source code files.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-03 18:32:57 +05:30
Sarat Chand Savitala
4968e7c610 sw_apps:zynqmp_fsbl: Updated watchdog code for JTAG bootmode
As in JTAG bootmode, watchdog is not initialized, avoided stopping of
watchdog in JTAG bootmode.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-03 14:55:49 +05:30
Sarat Chand Savitala
dff2a597f9 sw_apps:zynqmp_fsbl: Added watchdog support
This patch adds System Watchdog Timer support

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-02 21:27:53 +05:30
Sarat Chand Savitala
e1dd360db8 sw_apps:zynqmp_fsbl: Code cleanup involving emulation platforms
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:56:20 +05:30
RamyaSree
8dc4f9e7fd sw_apps: zynqmp_fsbl: Modified bus width in dummy phase.
This patch modifies the buswidth in dummy phase as
in data phase.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:19 +05:30
RamyaSree
8e402be829 sw_apps: zynqmp_fsbl: enabled cache for qspipsu boot.
This patch enables cache for qspipsu boot.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:19 +05:30
RamyaSree
6f67bc7850 sw_apps: zynqmp_fsbl: added Tx/Rx Flags in qspi message format
This patch added Tx/Rx flags in qspi message format
according to qspipsu driver changes.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:18 +05:30
Nava kishore Manne
e35699808d Update Tcl files to support MultiBd and Packaged Bd Designs
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
2015-07-31 16:55:01 +05:30
Sarat Chand Savitala
077e879e61 sw_apps:zynqmp_fsbl: Changed location of handoff for PMU FW
PMU FW if present, is now handed off immediately after its load and validation.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:54:45 +05:30
Sarat Chand Savitala
f513b80c1e sw_apps:zynqmp_fsbl: Added early handoff support
Support added to handoff to R5 applications after thery are loaded.
This feature can be turned ON by using conditional switch.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:54:44 +05:30
Sarat Chand Savitala
2f7303ed76 sw_apps:zynqmp_fsbl: Load address configuration in DDR for PL
Changed the location of temporary ddr address definition.
This address is for storing PL bitstream temporarily.
User can change this address till support is provided in bootgen
(for load address configuration for PL).

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-17 20:20:58 +05:30
Sarat Chand Savitala
487abcb1b4 sw_apps:zynqmp_fsbl: Power up check added for power islands
Added checks to power up power islands, if required, before first access.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-17 20:20:29 +05:30
Nava kishore Manne
904528b4bd lib:sw_apps:get_cells is changed to ::hsi::get_cells
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-07-13 17:38:07 +05:30
Nava kishore Manne
ce10360848 Revert "sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53"
This reverts commit 6713239caf3a66e29826de88ef0638ca39c0628c.
2015-07-06 23:45:58 +05:30
Sarat Chand Savitala
64e5e95917 sw_apps:zynqmp_fsbl: Fix in ATF handoff parameters for destination CPU
This fix populates the correct A53 CPU to which FSBL has to
hand off when partition is ATF.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:08 +05:30
Sarat Chand Savitala
0133313ae5 sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53
This enables saving of some OCM space for FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:06 +05:30
Sarat Chand Savitala
9083a0a512 sw_apps:zynqmp_fsbl: Fix to avoid conflict with ATF Handoff parameters location
This fix stores FSBL's ATF Handoff parameters at fixed address towards
end of OCM so that ATF can avoid conflict with its sections.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-06 10:30:05 +05:30
P L Sai Krishna
cfc2e87b18 zynqmp_fsbl: Added read only option and enabled it.
This patch add read only option and enabled it in mss
file for the Zynqmp fsbl.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-07-02 17:22:51 +05:30
Sarat Chand Savitala
58e0fb3ac2 sw_apps:zynqmp_fsbl: Updated reset release sequence for A53
Clock enable is now done before release of reset for A53.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-01 11:57:44 +05:30
Sarat Chand Savitala
1f87f492b1 sw_apps:zynqmp_fsbl: Updated bin file naming scheme for SD
For SD and eMMC, BIN filenames now follow convention BOOTXXXX.BIN.
FSBL now updated as per this change.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-07-01 11:57:43 +05:30
Sarat Chand Savitala
3b07202f16 sw_apps:zynqmp_fsbl: Added PL bitstream support
PL bitstream download support added.
Both secure and non-secure bitstreams are supported.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-20 13:08:13 +05:30
Sarat Chand Savitala
fd800dfb46 sw_apps:zynqmp_fsbl: Removed redundant calls to Xil_DCacheFlush()
Xil_DCacheDisable() function internally has call to Xil_DCacheFlush().
Hence removing redundant calls to Xil_DCacheFlush from FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-10 20:36:58 +05:30
Sarat Chand Savitala
4766bcb9f6 sw_apps:zynqmp_fsbl: Registering exception handlers
Exception handlers are now registered unconditionally for both A53 and R5
Removed enabling of IRQ from FSBL(to be enabled in user application)

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-10 20:36:57 +05:30
Sarat Chand Savitala
83eaa550d6 sw_apps:zynqmp_fsbl: Updated release version to 2015.3
Updated release version from 2015.1 SW Beta2 to 2015.3

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-06-10 20:36:56 +05:30
Nava kishore Manne
1726f14574 lib:sw_apps:standalone drivers license changes
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-05-16 14:37:24 +05:30
Sarat Chand Savitala
2374e5de1c sw_apps:zynqmp_fsbl: xilsecure library selection by default
While creating new FSBL+BSP project, made xilsecure library
to be selected by default. This avoids compilation errors
when FSBL project is created.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-05-14 07:55:03 +05:30
Sarat Chand Savitala
d7d271eb97 sw_apps:zynqmp_fsbl: Fix to make decryption work when authentication disabled
When authentication of partitions is not enabled, decryption is failing.
This patch fixes this issue.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-05-05 23:29:41 +05:30
Sarat Chand Savitala
380e426371 sw_apps:zynqmp_fsbl: Changes in FSBL as per the current xilsecure library
This patch does the changes in FSBL to match the signature changes of
few functions in xilsecure library.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
2015-04-27 17:37:44 +05:30
Sarat Chand Savitala
91f8d3bf88 sw_apps:zynqmp_fsbl: Added support for image decryption
Support for decryption of images added.
Authentication and decryption now use secure library APIs.
csu dma driver APIs are used now.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-04-22 11:50:09 +05:30