This patch fixes the issue
Done pin doesn't go high after programming
the 2nd stage bit stream.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
when -d option is used to dump all the registers,
It should ignore the Data register if it's empty or
Not set and should not return a failure in reading those registers.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
This patch adds the "Type" option of (b or h or w)
for the -c option when the help menu is printed.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
The MCAP interface enables an embedded microprocessor, such as MicroBlaze,
to read and write the FPGA configuration memory.
This library allows user to access the MCAP i/f.
Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
Added license.txt file - information about various licenses
and copyrights.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Srikanth Vemula <svemula@xilinx.com>
PMU FW if present, is now handed off immediately after its load and validation.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
Support added to handoff to R5 applications after thery are loaded.
This feature can be turned ON by using conditional switch.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
This patch modifies the file size as 8KB to test on emulation
platform. Since 8MB in emulation platform taking long time,
reduced file size to 8KB.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
This patch modifies the source code according to
MISRAC-2012.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
Modified cortexr5/gcc/Makefile to keep a correct check of a compiler
to update ECC_FLAGS correctly.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
Modified cortexa9/gcc/Makefile to keep a correct check of a compiler
to update ECC_FLAGS to fix a bug introduced during new version creation
of BSP
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies xil_settlbattributes API to work with
addresses > 4GB by modifying the address masking value
appropriate for higher addresses lies beyond 4GB
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
Add a separate platform file for Zynq Ultrascale MPSoC using the
respective timer and driver functions. The platform selection is
based on the processor recognized in the tcl file.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
Add support for recognizing processor A53 or R5 to work for
Zynq Ultrascale MPSoC
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
Add support to be used with newer version of GEM in Zynq Ultrascale MPSoC.
Use TX Q1 and RX Q0; segregate Zynq specific TLB attributes and SLCR settings.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
Add support for lwip library to be picked for A53 & R5 and to use
necessary GIC. Comment informational prints.
This is to add support for Zynq Ultrascale MPSoC.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
Modify makefile to check for IAR compiler to use --create and
remove individual checks for all other compilers.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the XUartLite_ReceiveBuffer function to
update the received data in critical region. Earlier the data
updation is outside the critical region.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch updates the iomodule_define_vector_table proc by
removing old hsi commands like xget_handle and also updates
the generate proc to get iomodule canonical definitions in
xparameters.h
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch renames DisplayPort TX Subsystem sub-core files name
with prefix xdptxss_, functions with prefix XDpTxSs_ and macors
with prefix XDPTXSS_.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem.
Added makefile and tcl to build the subsystem tree and updated
the driver to construct sub-core baseaddress
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem by reorganizing
the HLS generated code to align with xilinx driver guidelines.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem by reorganizing
the HLS generated code to align with xilinx driver guidelines.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem by reorganizing
the HLS generated code to align with xilinx driver guidelines.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem by reorganizing
the HLS generated code to align with xilinx driver guidelines.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem by reorganizing
the HLS generated code to align with xilinx driver guidelines.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem by reorganizing
the HLS generated code to align with xilixn driver guidelines.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch supports HIP based video processing subsystem
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This is a new driver for updated tpg ip in the catalogue
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch does card detection check before disk
status call, since BaseAddress and card detect
variables will be assigned in disk_status API.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
Changed the location of temporary ddr address definition.
This address is for storing PL bitstream temporarily.
User can change this address till support is provided in bootgen
(for load address configuration for PL).
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
Added checks to power up power islands, if required, before first access.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
This patch adds definition of macro XPAR_XGPIO_NUM_INSTANCES, controls config
table parameters with macro XPAR_XGPIO_NUM_INSTANCES.
These changes are to avoid compilation errors in Subsystem driver if Subsystem
HIP is not included gpio as subcore, results gpio driver not in BSP.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This patch adds definition of macro XPAR_XAXIS_SWITCH_NUM_INSTANCES, controls
config table parameters with macro XPAR_XAXIS_SWITCH_NUM_INSTANCES.
These changes are to avoid compilation errors in Subsystem driver if
Subsystem HIP is not included axis_switch as subcore, results axis_switch
driver not in BSP.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This patch adds definition of macro XPAR_XAXIVDMA_NUM_INSTANCES, controls
config table parameters with macro XPAR_XAXIVDMA_NUM_INSTANCES.
These changes are to avoid compilation errors in Subsystem driver if Subsystem
HIP is not included axivdma as subcore, results axivdma driver not in BSP.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This patch modifies the makefile for a53 to take the compiler and
archiver name from cpu tcl rather than fixing them.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch modifies the makefile for r5 to take the compiler and
archiver name from cpu tcl rather than fixing them.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch removes the extra write operation taking place
in XEmacLite_AlignedWrite while writing data to destination
address.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
This patch modifies the compiler and archiver name in mdd file
to support the latest toolchain name change. It also includes
-mcpu=cortex-r5 flag to compiler flag to compile the drivers
and libraries with this flag which would help to remove the flag
from individual makefile.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch modifies xil_printf to add support for 64bit
pointer value print in case of 64bit mode. It adds support
to print 64 bit value for long integer and long hex.
It also removes unknown specifier 'D'.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch adds definition of macro XPAR_XDUALSPLITTER_NUM_INSTANCES, disables
config table when XPAR_XDUALSPLITTER_NUM_INSTANCES undefined and equal to
zero.
These changes are to avoid compilation errors in DisplayPort Subsystem driver.
DisplayPort Subsystem HIP does not include Dual Splitter core in Single
Transport Mode (SST) but Subsystem driver adds depends clause in its .mdd file
to pull Dual Splitter driver in BSP.
DisplayPort Subsystem HIP does not include Dual Splitter core in Single
Transport Mode (SST) but Subsystem driver adds depends clause in its .mdd file
to pull Dual Splitter driver in BSP.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
