Mirrors/VILLASnode
1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Code Issues Releases Wiki Activity
6286 commits 171 branches 31 tags 76 MiB
Commit graph

68 commits

Author SHA1 Message Date
Niklas Eiling
3300e7b2cd fpga: Add axis_cache.cpp to CMakeLists.txt 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2025-01-24 10:32:57 +01:00
Steffen Vogel
4b36073711 Use spaces for indention of CMake files 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2024-02-29 23:18:47 +01:00
Steffen Vogel
a2abaa3cda Merge project files, scripts and CMake files of VILLASfpga 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2024-02-29 19:33:23 +01:00
Niklas Eiling
d54e4eb3f0 ips/register: add IP for the new register interface 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
645429b9c8 lib/CMakeLists.txt: fix error in syntax 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-12 12:01:51 +01:00
Niklas Eiling
147725daef libvillas-fpga.so: only link with stdc++fs for gcc8 and earlier 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-12 11:46:59 +01:00
Niklas Eiling
f086c325c2 link with stdc++fs to avoid compiler error on newer gcc versions 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
3e74c0d7a4 remove linking to libjansson from libvillas-fpga because this is already 
included in libvillas-common.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
7e07da6e60 add i2c ip draft 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Steffen Vogel
157d5b21d7 Make REUSE copyright notice the same as in other VILLASframework projects and fix comments (#82) 
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework.

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

---------

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2023-09-08 11:35:18 +02:00
Niklas Eiling
d9993409e0 fix possible NULL dereferencing in villasfpga_dma.c 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-03-21 14:56:54 +01:00
Niklas Eiling
b05910f24e add C bindings for external use of VILLASfpga 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-03-20 17:12:47 +01:00
Pascal Henry Bauer
3587ccc0fa change pciecard name to pcie_card 
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
 2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
a10e568777 added pcieclass to buildsystem 
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
 2023-01-26 18:30:14 +01:00
Steffen Vogel
94cf3583d8 fix naming of fpgaHelper file 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2023-01-09 08:11:35 +01:00
Steffen Vogel
9b27c31b9c fixup copyright texts 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2023-01-07 17:32:48 +01:00
Steffen Vogel
f776cba693 relicense project to Apache 2.0 
The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66

Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2023-01-07 17:20:15 +01:00
Steffen Vogel
53ddbe4e10 refactor registration of IP core drivers to be aligned with registration of VILLASnode formats and node-types 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2023-01-05 14:21:20 +01:00
Niklas Eiling
e029963839 move helper functions from villas-fpga-pipe into separate file 2022-11-29 14:51:53 +01:00
Steffen Vogel
5fc556523c add libxil as a submodule 2022-11-11 03:12:53 -05:00
Steffen Vogel
0e0197a3be fix coding style 2022-10-28 08:03:57 -04:00
Steffen Vogel
9ef01d068e update year in copyright notices 2022-08-30 12:22:40 -04:00
Steffen Vogel
5c68a22ffe add new IP core for standard Xilinx Aurora cores 2022-08-30 12:21:46 -04:00
Steffen Vogel
2bbe5bc0ab cmake: allow linking libxil from non-standard location 2020-11-12 00:19:55 +01:00
Steffen Vogel
08114652d6 emc: add stub IP 2020-07-08 15:20:05 +02:00
Steffen Vogel
d938bd95b1 cmake: fixups for inclusion into VILLASnode 2020-06-14 22:11:58 +02:00
Steffen Vogel
6b3164dd26 refactor IpNode and IpCore class names 2020-06-12 00:05:03 +02:00
Steffen Vogel
86f8997b05 gpio: add new IP for AXI programmable GPIO 2020-06-11 15:58:02 +02:00
Hatim Kanchwala
bf67a2e5f0 Add initial Aurora driver 2020-06-02 00:54:31 +02:00
Steffen Vogel
5361c1d20d move gpu module to top level directory 2018-08-21 15:53:47 +02:00
Steffen Vogel
3f119896e9 ci: some tweaks to fix unit-tests 2018-08-21 15:29:37 +02:00
Steffen Vogel
2112038d70 Merge branch 'feature/hls-rtds2gpu' into develop 2018-08-21 13:51:32 +02:00
Steffen Vogel
76b1695586 move more code to VILLAScommon repo 2018-08-21 13:27:04 +02:00
Steffen Vogel
de566d441d move common code to VILLAScommon submodule 2018-08-21 01:14:18 +02:00
Steffen Vogel
7409d2024d add more copyright / license headers 2018-06-25 17:03:09 +02:00
Daniel Krebs
f413712b86 gpu2rtds: unit test working 2018-06-04 17:36:36 +02:00
Daniel Krebs
28458fdf8a update rtds2gpu HLS IP to v1.1 
- better tested IP (testbenches)
 - detect invalid frame sizes
 - more status reporting
 2018-06-04 17:36:15 +02:00
Daniel Krebs
bf286568dd rtds2gpu IP works 2018-06-04 17:36:15 +02:00
Daniel Krebs
28143e7188 ips/rtds: add C++ version of RTDS IP 2018-06-04 14:20:06 +02:00
Daniel Krebs
fcfb3d8020 lib: change include path: must be <villas/...> now 2018-06-04 14:20:06 +02:00
Daniel Krebs
d2384abb9d cmake: only build GPU library if CUDA is present 2018-05-16 10:58:18 +02:00
Daniel Krebs
d81fc6fe11 gpu: add empty library for GPU-related stuff 2018-05-15 18:04:24 +02:00
Daniel Krebs
9870749546 lib/common: move plugin, utils and memory stuf into common library 2018-04-23 10:07:40 +02:00
Daniel Krebs
3e505c74bf ips/bram: add block RAM IP and use it with DMA test 2018-04-13 15:35:41 +02:00
Steffen Vogel
cc3e042949 Merge branch 'develop' into 'feature/packaging' 
# Conflicts:
#   CMakeLists.txt
 2018-04-05 11:43:33 +02:00
Steffen Vogel
3f5bef34b3 added pkg-config file and CMake configuration for building RPM packages 2018-04-05 11:29:16 +02:00
Daniel Krebs
507ea77ad6 ips/dma: add (simple) DMA driver 2018-03-26 16:17:26 +02:00
Daniel Krebs
60882f1086 lib/memory: implement memory handling with allocators and blocks 
This commit is 2/2 of a series of patches and not working on its own.
 2018-03-26 16:17:20 +02:00
Daniel Krebs
b01a50184c kernel/vfio: port to C++ 
This commit is 1/2 of a series of patches and not working on its own.
 2018-03-26 16:16:42 +02:00
Daniel Krebs
e2ce250288 lib: remove leftover (warning) compiler options 
These are now set in the root CMakeLists.txt
 2018-02-14 10:06:55 +01:00