As per specification.
- Always enable enhanced framing mode.
- Declare training pattern 3 support if core is DP v1.2.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
If an interrupt occurs without a user defined callback, don't invoke the
function.
Otherwise, unexpected behavior will be seen due to running code from 0x0 (NULL).
Prior to this, it was the responsibility of the user to ensure all callbacks for
interrupts were set.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
The interrupt mask and interrupt cause registers are independent. The interrupt
handler has been modified to ignore interrupts that have been masked out.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Added new interrupts, callbacks, and macros related to HDCP (High-bandwidth
Digital Content Protection).
Added new interrupts, callbacks, and macros for an unplug event.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Fixed compilation warnings when using:
-Wall -Wextra
No need for ">=0" assertions on arguments that are of unsigned type.
Removed unused variables.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
The naming of this example is better described as SST with DP159
functionality.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
The programming sequence required by the DP159 retimer has been
added.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Set the reset value for the timer upon initialization.
Use the timer ID as an argument for consistency with the other
device IDs.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Using the DP159 solution, 8 ms needs to be used as the AUX training
interval.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
RX initialization is not dependent on PLL and reset checks.
- Training will not be initiated until the RX is ready.
The clock is transmitted only once the cable is connected.
- This means that the CPLLs will never lock if no cable is plugged
in resulting in DP RX core initialization time out.
Moved core and interrupt mask enables towards end of function.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
-Added logic to fix vdma ip alignement issues with different bit
width at axis and aximm interface at all supported pixel/clk
and color depth combinations
-Moved stream (input/output) validation logic scattered around
in different blocks to a central location
-Added API to report subsystem configuration status
-Code cleanup and changed relevant prints to dbg print
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
4 Samples/Clock phase calculation logic works on 64bit entities.
However a 32bit variable was used that caused wrong phase
information to be generated. Updated relevant variables to 64b
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
- Code cleanup to remove interrupt handler registration.
Subsystem does not have interrupts
- Updated sub-core init routines to load default filter
coefficients for scaler and chroma resamplers
- Added layer 2 registers for chroma resamplers
- Updated VDMA Read/Write interface to work with color depth
instead of Bytes/Pixel
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
- IP updated to add multiple pixel/clk support.
- Added default filter coefficient table for 6/8/10/12 taps
- Added API to load default coefficients or allow user to load
externally defined coefficients
- Peformed code cleanup to remove coefficient generation logic
(scaler to use fixed coefficients)
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
-Added filter coefficient table for 4/6/8/10 taps.
-Added API to load the default coefficients
-Added API to allow user to load coefficients
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
- IP updated to add multiple pixel/clk support.
- Added default filter coefficient table for 6/8/10/12 taps
- Added API to load default coefficients or allow user to load
externally defined coefficients
- Peformed code cleanup to remove coefficient generation logic
(scaler to use fixed coefficients)
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
-Added filter coefficient table for 4/6/8/10 taps.
-Added API to load the default coefficients
-Added API to allow user to load coefficients
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
IP updated to add multiple pixels per clock support resulting in
API changes in driver.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch adds copyright info to HLS generated mdd file
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This patch use MB_Sleep API for microblaze design
and removed sleep.h inclusion in xsdps.h file.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
BUFFNA is not an error and hence the status bit is cleared by the
driver. But the error handler callback is called with a zero error
code in this case. Correct the same.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
This patch fixes the issue AXI Ethernet with FIFO will fail to
create the BSP if the interrupt pin on the FIFO is unconnected.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch converts the three line comments to single line
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch adds common routines by removing the possible redundant
code from the functions.
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This change is to reduce the size of the static bbt table size
from 8KB to 4KB because so far we have not identified the
flash part that has more than 16K blocks and also it will
reduce the bsp size.
Driver warns if the device has more number of blocks than the
defined value so that this can be incremented in future and if
there is a part available.
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
As per the csurom, Bbt signature is always stored in oob area.
So, to sync with csurom, removing the NO_OOB(Bbt signature stores
in page area) functionality.
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
