Commit graph

1282 commits

Author SHA1 Message Date
Shadul Shaikh
1e332095b8 dptxss: Added HDCP example
This patch adds HDCP example and modifies examples, readme, index
files.

Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
2015-10-14 23:09:34 +05:30
Shadul Shaikh
47fe2ff165 dptxss: Integrated HDCP, Timer in DisplayPort Transmitter Subsystem
This patch integrates HDCP, Timer in DisplayPort TX Subsystem.

Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
2015-10-14 23:09:34 +05:30
Shadul Shaikh
4ef87ec22c dprxss: Added HDCP example
This patch adds HDCP example and modifies examples, index, readme files.

Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
2015-10-14 23:09:33 +05:30
Shadul Shaikh
879b09fd24 dprxss: Integrated HDCP, Timer in DisplayPort RX Subsystem
This patch integrates HDCP and Timer in DisplayPort Receiver Subsystem.

Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
2015-10-14 23:09:31 +05:30
VNSL Durga
c1cecfadc7 ZDMA: Modified ZDMA simple transfer example
Hardcoded address for pointers are changed to arrays.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Acked by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-10-14 10:37:57 +05:30
VNSL Durga
5e98df225c Xilskey: Modified efuse example
Added new lines in example prints.
Modified CRC calculation API name and
provided backward compatability.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:56:09 +05:30
VNSL Durga
545e14f93b xilskey: Modified changelog txt
Modifications for 4.0 and 3.0 are added to changelog

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:56:02 +05:30
VNSL Durga
09c1374102 xilskey: Corrected error code names
Error codes names of efuse PL Ultrascale are corrected

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:54 +05:30
VNSL Durga
2af5aa5b71 xilskey: Added BBRAM Ps example
To program Bbram PS example is provided this example
doesnot require any input.h file it doesnot contain any control
bits to be programmed.
It has only one feature is to program AES key into BBRAM.
User can edit the macro XSK_ZYNQMP_BBRAMPS_AES_KEY with the key
to be programmed.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:45 +05:30
VNSL Durga
507e33c593 Xilskey: Added Example for Zynq MP efusePs
To program efuse PS of Zynq MP user has to edit input.h file
in input.h file default all will be in FALSE sate which ever has to be
programmed need to be changed to TRUE.
In example after programming cache will be reloaded and keys will be
read from cache. If user wants read API can be changed to read from
efuse memory.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:36 +05:30
VNSL Durga
b92437c68b xilskey: Added BBRAM PS functionality
Added BBRAM PS programming APIs for Zynq MP platform
In BBRAM there is no provision for saperate CRC check
CRC check can be performed only while programming AES key
So user no need to calculate CRC of key if they provide key
for programming CRC check will also be performed internally.
User can also make BBRAM key to Zero at any time.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:27 +05:30
VNSL Durga
e7aeea3a1f xilskey: cleaned library's makefile
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:19 +05:30
VNSL Durga
53ebf58e2e xilskey: Added efuseps APIs for Zynq MP
For ZynqMp platform's Efuse PS interface functions are added.
In efuse PS we can programm AES, User keys and PPK0, PPK1 hashs
SPK Id, JTAG  user code and including some control bits.
If Tbits are not programmed some programming features can't be
programme, user no need to call any API to program this Tbits
they are programmed internally when you tried to program any
of the programming bits if Tbits are not programmed on efuse.
PPK hash accepts input in the form bootgen's hash output
user no need to change HASH.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:10 +05:30
VNSL Durga
72073f36fe xilskey: Added Xilskey write and read regs APIs
Modified CRC calculation API to calculate CRC of
ZynqMP efuse PS's AES CRC.
Added Ceil function to calculate ceil.
Added write and read registers APIs.
Modified Xilskey_CrcCalculation API to
XilSKey_CrcCalculation

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:55:00 +05:30
VNSL Durga
66a63c151b xilskey: Provided conditional compilation
To support Zynq MP platform conditional compilation
is provided.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:54:49 +05:30
VNSL Durga
f8ed126215 xilskey: Added efuse PS and bbram PS support
Added dependencies.props file is addded to pick required
.h file for selected example file.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 18:52:20 +05:30
Harini Katakam
05efa29697 lwip: Add support for TI phy
Change the initialization, TX/RX tuning and auto negotiation sequence
as per TI phy spec.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 18:30:40 +05:30
Harini Katakam
ed027bf4b9 qspipsu: Increase setup and hold time
Increase the setup and hold time of qspi to accomodate for a worst case
of ~15ns with ref clk of 300MHz.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-10-12 18:21:47 +05:30
Kinjal Pravinbhai Patel
3c80ca4b5b sw_apps: updated openamp rpc demo description for zynq support
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 18:21:31 +05:30
Kinjal Pravinbhai Patel
fe5cf411ba sw_apps: updated openamp matrix multiply description for zynq support
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 18:21:20 +05:30
Kinjal Pravinbhai Patel
50e5bc791b sw_apps: updated openamp echo test description for zynq support
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 18:21:06 +05:30
Rohit Consul
33835aa8dc v_hdmitx: Add initial version of hdmi tx core driver
Added hdmi tx core driver v1.0 (on behalf of Gilbert Magnaye)

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-10-12 16:29:53 +05:30
Rohit Consul
a42863ac75 v_hdmirx: Add initial version of hdmi rx core driver
Added hdmi rx core driver v1.0 (on behalf of gilbert magnaye)

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-10-12 16:29:43 +05:30
Rohit Consul
a6f402d225 v_hdmitxss: Add initial version of hdmi tx subsystem driver
Added hdmi tx subsystem driver v1.0 (on behalf of Gilbert
Magnaye)

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-10-12 16:29:33 +05:30
Rohit Consul
3713b27d5a v_hdmirxss: Add initial version of hdmi rx subsystem driver
Add initial revision of hdmi rx subsystem driver

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-10-12 16:28:58 +05:30
P L Sai Krishna
ce8d105a07 xilopenamp: Corrected the Makefile for IAR.
This patch modifies the Makefile of xilopenamp to
remove the compilation error for IAR compiler.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 13:09:11 +05:30
P L Sai Krishna
a285a07ea5 xilsecure: Corrected Makefile error for IAR.
This patch modifies the Makefile of xilsecure to
remove the compilation errors for IAR compiler.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 13:09:03 +05:30
P L Sai Krishna
9b24ae0a67 xilisf: Corrected the Makefile error for IAR.
This patch modifies the Makefile of xilisf to
remove the compilation errors for IAR compiler.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 13:08:54 +05:30
P L Sai Krishna
07a30bad5b xilflash: Corrected the Makefile error for IAR.
This patch modifies the xilflash Makefile to
remove the compilation error for IAR compiler.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 13:08:43 +05:30
P L Sai Krishna
2e94f1a88e xilffs: Corrected Makefile error for IAR.
This patch modifies the make file of xilffs to
remove the compilation error for IAR compiler.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 13:08:14 +05:30
Shadul Shaikh
1917c9d19e dptxss: Added index.html file
This patch adds index.html file in examples folder

Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei-Liviu Simion <andreis@xilinx.com>
2015-10-12 10:56:48 +05:30
Shadul Shaikh
c55f4acbc2 dptxss: Added custom resolution support
This patch adds custom resolution support and wrapper function
for setting a redriver path.

Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei-Liviu Simion <andreis@xilinx.com>
2015-10-12 10:56:18 +05:30
VNSL Durga
f421c75450 Xilskey: Modified JtagWrite API
According to IEEE 1149.1 programming will start after
TCK toggle at higher edge of clock and will be ended at
RTI state change and followed TCK toggle.
So JtagWrite API is modified accordingly.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 10:46:24 +05:30
VNSL Durga
601ba781fb xilskey: Added DFT control bits programming
DFT JTAG disable and DFT mode disable control bits
programming and reading from status register are added
to efuse example and also input macros in xilskey_input.h
file.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 10:46:13 +05:30
VNSL Durga
1553beac28 xilskey: Added DFT control bits
DFT control bits of efusePS for Zynq Platform is
added.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 10:46:01 +05:30
VNSL Durga
41169b9bfd xilskey: Added new version
Support for programming DFT bits is provided.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-10-12 10:45:31 +05:30
Rohit Consul
86f6445653 v_tpg: Bug fix for vidout lock monitor read mechanism
Fixed the read API for video lock monitor to read from
peripheral. Update example design to align with example design
update in hw

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-10-12 10:45:15 +05:30
Andrei-Liviu Simion
0c17eca07b dp: Updated version to 3.0.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:09:56 +05:30
Andrei-Liviu Simion
e3261eabd9 dp: rx: Fixed mask value for TPS3.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:09:48 +05:30
Andrei-Liviu Simion
a1f01dfd16 dp: Set all instance structure values to 0.
Parts of the driver check whether or not the function pointers are
set and call appropriate callbacks if they are.
Ensure function pointers are set to 0 / NULL during configuration
initialization.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:09:38 +05:30
Andrei-Liviu Simion
6881673da5 dp: tx: Added callback for MSA updates.
When the MSA is updated, provide a mechanism to run a user-defined
callback instead of using the MSA values from the driver's
structure.

This is useful if another DP core exists in the system (RX). Using
the new callback mechanism, the user can specify to use whatever
MSA values exist in the RX core as the values to transmit.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:09:27 +05:30
Andrei-Liviu Simion
696be93f8d dp: mst: Removed unneeded assignment.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:09:18 +05:30
Andrei-Liviu Simion
b926ec9238 tmrctr: Added AXI clock frequency to config.
Expose the AXI bus clock frequency to the higher-level.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:09:07 +05:30
Andrei-Liviu Simion
eb17e0e830 tmrctr: Protect against driver inclusion without core.
A driver may be included even when there is no associated core
present. (See the DEPENDS option in data/*.mdd).

If another driver includes this TmrCtr driver, despite no
associated timer counter core existing, then xtmrctr.tcl won't be
invoked by SDK and the xtmrctr_g.c will not be generated.
If this file is not generated, the BSP will include the default
xtmrctr_g.c which was previously assuming that there is at least
one instance of the core in the system.

Also, the XPAR_XTMRCTR_NUM_INSTANCES wasn't being defined in this
case.

Protection against such a scenario is required.
Some subsystem drivers will include all subcore drivers,
regardless whether they are a part of the system or not.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:56 +05:30
Andrei-Liviu Simion
8631d7b7a1 hdcp1x: Added example _g.c file.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:47 +05:30
Andrei-Liviu Simion
22a0b99cb9 hdcp1x: Updated version to 2.0.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:38 +05:30
Andrei-Liviu Simion
0e440b93e0 hdcp1x: Define number of instances if not defined.
Some subsystem drivers have dependencies on all subcore drivers.
If no subcore of that type is present, the HDCP subcore driver's
TCL file won't be executing, and the XPAR_XHDCP_NUM_INSTANCES
will remain undefined.
This will cause a compilation error due to XHdcp1x_LookupConfig
using this definition.

This patch protects against such a scenario.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:29 +05:30
Andrei-Liviu Simion
13caf612bc hdcp1x: Updated configuration initialization.
The configuration initialization function is now consistent with
other drivers.

Added effective address as an argument to CfgInitialize.
This is necessary when memory addresses are translated differently
from the physical base address and for subsystem drivers whose
subcore base addresses appear as relative offsets to the base
address of the subsystem.

Moved configuration related content from LookupConfig to
CfgInitialize.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:17 +05:30
Andrei-Liviu Simion
5136ca98fe hdcp1x: Updated HDMI driver usage.
Driver has been renamed to XV_Hdmi* rather than XHdmi*.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:09 +05:30
Andrei-Liviu Simion
772862ce87 tmrctr: Updated version to 4.0.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
2015-10-11 12:08:01 +05:30