This patch adds HDCP example and modifies examples, readme, index
files.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
This patch adds HDCP example and modifies examples, index, readme files.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
This patch integrates HDCP and Timer in DisplayPort Receiver Subsystem.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei Simion <andreis@xilinx.com>
Added new lines in example prints.
Modified CRC calculation API name and
provided backward compatability.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
To program Bbram PS example is provided this example
doesnot require any input.h file it doesnot contain any control
bits to be programmed.
It has only one feature is to program AES key into BBRAM.
User can edit the macro XSK_ZYNQMP_BBRAMPS_AES_KEY with the key
to be programmed.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
To program efuse PS of Zynq MP user has to edit input.h file
in input.h file default all will be in FALSE sate which ever has to be
programmed need to be changed to TRUE.
In example after programming cache will be reloaded and keys will be
read from cache. If user wants read API can be changed to read from
efuse memory.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
Added BBRAM PS programming APIs for Zynq MP platform
In BBRAM there is no provision for saperate CRC check
CRC check can be performed only while programming AES key
So user no need to calculate CRC of key if they provide key
for programming CRC check will also be performed internally.
User can also make BBRAM key to Zero at any time.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
For ZynqMp platform's Efuse PS interface functions are added.
In efuse PS we can programm AES, User keys and PPK0, PPK1 hashs
SPK Id, JTAG user code and including some control bits.
If Tbits are not programmed some programming features can't be
programme, user no need to call any API to program this Tbits
they are programmed internally when you tried to program any
of the programming bits if Tbits are not programmed on efuse.
PPK hash accepts input in the form bootgen's hash output
user no need to change HASH.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
Modified CRC calculation API to calculate CRC of
ZynqMP efuse PS's AES CRC.
Added Ceil function to calculate ceil.
Added write and read registers APIs.
Modified Xilskey_CrcCalculation API to
XilSKey_CrcCalculation
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
Change the initialization, TX/RX tuning and auto negotiation sequence
as per TI phy spec.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
Increase the setup and hold time of qspi to accomodate for a worst case
of ~15ns with ref clk of 300MHz.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
This patch modifies the Makefile of xilopenamp to
remove the compilation error for IAR compiler.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the Makefile of xilsecure to
remove the compilation errors for IAR compiler.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the Makefile of xilisf to
remove the compilation errors for IAR compiler.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the xilflash Makefile to
remove the compilation error for IAR compiler.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the make file of xilffs to
remove the compilation error for IAR compiler.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch adds custom resolution support and wrapper function
for setting a redriver path.
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Andrei-Liviu Simion <andreis@xilinx.com>
According to IEEE 1149.1 programming will start after
TCK toggle at higher edge of clock and will be ended at
RTI state change and followed TCK toggle.
So JtagWrite API is modified accordingly.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
DFT JTAG disable and DFT mode disable control bits
programming and reading from status register are added
to efuse example and also input macros in xilskey_input.h
file.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
DFT control bits of efusePS for Zynq Platform is
added.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
Fixed the read API for video lock monitor to read from
peripheral. Update example design to align with example design
update in hw
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Parts of the driver check whether or not the function pointers are
set and call appropriate callbacks if they are.
Ensure function pointers are set to 0 / NULL during configuration
initialization.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
When the MSA is updated, provide a mechanism to run a user-defined
callback instead of using the MSA values from the driver's
structure.
This is useful if another DP core exists in the system (RX). Using
the new callback mechanism, the user can specify to use whatever
MSA values exist in the RX core as the values to transmit.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
Expose the AXI bus clock frequency to the higher-level.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
A driver may be included even when there is no associated core
present. (See the DEPENDS option in data/*.mdd).
If another driver includes this TmrCtr driver, despite no
associated timer counter core existing, then xtmrctr.tcl won't be
invoked by SDK and the xtmrctr_g.c will not be generated.
If this file is not generated, the BSP will include the default
xtmrctr_g.c which was previously assuming that there is at least
one instance of the core in the system.
Also, the XPAR_XTMRCTR_NUM_INSTANCES wasn't being defined in this
case.
Protection against such a scenario is required.
Some subsystem drivers will include all subcore drivers,
regardless whether they are a part of the system or not.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
Some subsystem drivers have dependencies on all subcore drivers.
If no subcore of that type is present, the HDCP subcore driver's
TCL file won't be executing, and the XPAR_XHDCP_NUM_INSTANCES
will remain undefined.
This will cause a compilation error due to XHdcp1x_LookupConfig
using this definition.
This patch protects against such a scenario.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
The configuration initialization function is now consistent with
other drivers.
Added effective address as an argument to CfgInitialize.
This is necessary when memory addresses are translated differently
from the physical base address and for subsystem drivers whose
subcore base addresses appear as relative offsets to the base
address of the subsystem.
Moved configuration related content from LookupConfig to
CfgInitialize.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
Driver has been renamed to XV_Hdmi* rather than XHdmi*.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
