This patch modifies Xil_DCacheInvalidateRange and Xil_DCacheFlushRange
to remove unnecessary dsb in the APIs. It also adds necessary
Xil_L2CacheSync in Xil_L2CacheInvalidateRange API.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch changes the initialization order in boot.S to follow
the correct order as specified in CortexA9 TRM
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Modified boot code to enable scu after MMU is enabled and
removed incorrect initialization of TLB lockdown register in
gcc/boot.S & cpu_init.S, armcc/boot.S and iccarm/boot.s
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch unifies standalone for both Zynq and ZynqMP
platforms. Also follows misrac guidelines.
Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
This patch modifies translation table entries in armcc/translation_table.s and
iccarm/translation_table.s to fix the compilation error
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch modifies translation table entries for cortexa9 in armcc/translation_table.s,
gcc/translation_table.s and iccarm/translation_table.s to match with the address map of
zynq
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Do not use r16 to pass arguments to mcount
Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch removes PEEP related code from standalone
BSP cortexa9 and also removes uart.c and smc.c.
Also removed function definition of XSmc_NorInit and
XSmc_NorInit from cortexa9/smc.h
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch fixes issue of "unknown type name u32" for xil_mmu.h
file by including xil_types.h in xil_mmu.h
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch fixes issue of incorrect reset value of event
counter in Xpm_ResetEventCounters function in src/cortexa9/xpm_counter.c file
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch fixes issue of multiple definition of function in
toolchain and BSP for some special cases.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch fixes the issue of improper linking of translation_table.s
by changing the cortexa9/armcc/Makefile
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch enables asynchronous abort exception in boot.s and
adds default exception handler for data abort and prefetch abort
for debug purpose.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch removes this line and doing so it allows to output the
xdbg_printf() debug logs when -DDEBUG flag is enabled for BSP.
Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch adds support for iar compiler into standalone BSP for cortexa9
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
