This patch modifies translation_table.S to put check whether
the DDR is present or not to fix the compilation error in
case of DDR-less system
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Underlying subcores now use model parameters to get the static
configuration. Update the subsystem drivers to use this
information. Also user defined scaler cofficient table is moved
to application code
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated tcl file to include model parameters. Also updated the
code to use new parameters instead of hard-coded values defined
earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated the tcl and mdd files to define model parameters. Updated
the code to use new parameters instead of hard-coded values
defined earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated the tcl and mdd files to define model parameters.
Updated the code to use new parameters instead of hard-coded
values defined earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated the tcl and mdd files to define model parameters.
Updated the code to use new parameters instead of hard-coded
values defined earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated the tcl and mdd files to define model parameters.
Updated the code to use new parameters instead of hard-coded
values defined earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated the tcl and mdd files to define model parameters.
Updated the code to use new parameters instead of hard-coded
values defined earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Updated the tcl and mdd files to define model parameters.
Updated the code to use new parameters instead of hard-coded
values defined earlier
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Video processing subsystem driver is added to the repo. This
driver currently is associated with a non-HIP version of the
IP. No makefile available. Hard-coded g.c file used, but not
included.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
HLS generated Layer 1 driver for csc core along with
manually written layer 2. Pending update of driver tcl
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
This patch removes xmpu, slcr, xppu header files from cortexr5 folder
and standalone tcl has been modified to copy the header files from
cortexa53/includes_ps. Makefile has been modified to include the
header files in include folder while compilation
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch creates folder 64bit to accomodate cortex-a53 64bit
mode BSP files and creates another folder includes_ps for
xmpu, xppu, slcr header files. It also changes the standalone tcl to
reflect the necessary changes
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch modifies the check for whether bank crossover
in flash read functions for parallel case. This will fix
the bug where wrap around occurs to the top of flash when
reading very bottom..
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Compiler flags for psu_microblaze BSP, based on HW IP parameters, are not being generated by HSI. This is being done for normal microblaze by an unknown entity in the build flow and the same is being figured out. However the same flags can be generated by using cpu tcl and this work-around is implemented here.
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
PMU Microblaze related parameters are generated into xparameters.h based on the IP parameters.
This tcl generates parameters with prefix XPAR_MICROBLAZE so that they can be used with generic microblaze bsp/drivers.
Clock frequency param is also generated based on C_FREQ param of psu_microblaze IP.
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
This patch modifies the SPI flash examples to support for
Zynq Ultrascale MPSoC. In zynq we are selecting the hardware
using chip select 0 where as in Zynq Ultrscale MPSoC we have
to use chip select 1 to select the hardware and we are using
different interrupt id's for Zynq and Zynq Ultrascale MPSoC.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch updated the canfd Data swaping issue and updated the
AFRID and AFRMASK offsets to correct values.
Signed-off-by: naga sureshkumar relli <nagasure@xilinx.com>
