This patch updates the register offsets in the AXI4 data path
as per latest IP version(v4.1).
The addresses are changed to accommodate increased data width.
With old address map and increased data width user had to generate AXI4 unaligned transactions.
Therefore, the address map was changed for ease of use in the IP.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Check for card detection only if that signal is present
(based on HAS_CD macro)
Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: Harini Katakam <harinik@xilinx.com>
This does following things
1. For lees than 8 byte requests, done in IO mode.
2. One dummy GenFifo entry at the end in case of IO mode.
3. used memcpy while filling TxFifo.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
While creating new FSBL+BSP project, made xilsecure library
to be selected by default. This avoids compilation errors
when FSBL project is created.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
The makefile tries to detect gnu vs ARM toolchain by string-comparing
the COMPILER with some hardcoded values. This fails when the toolchain
is specified with directory components. Hence, remove directory
components from the tests.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
When authentication of partitions is not enabled, decryption is failing.
This patch fixes this issue.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
The recommendation from design is to have bus width of dummy entry =
bus width of address phase (whether this is 1, 2 or 4).
This code will remain same irrespective of QEMU. Hence change the comment.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
This patch does the changes in FSBL to match the signature changes of
few functions in xilsecure library.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
The pm_client.h headers hold processor specific information. Move common
information to the common header.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
swbeta2 commit 1b173007d1cc009bffeb2969a5a5bacc533647db
IPI0 is used by PMUFW for PM requests and the mask is used for determining
the Master. There are chances of IPIs being triggered before FW Init but
un-handled or even bits that are not cleared by ROM, causing a corruption
of the ISR mask. So PMUFW should cleanup these bits during startup
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
swbeta2 commit 572db0eb0f48b4f7f5684abea721c6fac92ccdee
When powering up the RPU island the individual RPU core resets as well
as the reset for the whole island are asserted. To ensure proper resume,
the island reset needs to be released when the island is powered up.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
swbeta2 commit ae6d9a98edb99ce4c51c85bce4872a9f11c7eb74
PMU Firmware is being updated to the latest code base available
in the pmufw git repo. Major changes are:
-Error Management is enabled by default
-PM Module bug fixes
-Code formatting changes
-PMU ROM handlers use ROM Table instead of
individual handler addresses
-Bug fixes in scheduler
-FW_IS_PRESENT bit is set if PM is enabled
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
swbeta2 commit 90e16f97eb510ea91702729bf38bc7c7d5d62dba
FSBL inits the TCMs that are used by R5 Apps. We have vectors in TCM-A
and that data is passed on to FSBL and it is initialized. So using the
same TCM block as vectors ensures that we use an intialized memory and
avoids ECC errors due to RMW or Reads of uninitialized memory locations.
In JTAG mode, TCM still needs to be initialized using XSDB.
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
swbeta2 commit 8e5bf013a42c56c713efcfa1ab00c78e648b2333
To ensure we resume at the correct vector address, set the VINITH bit
accordingly.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
swbeta2 commit 7ebba935262ebff0df604fd560f4a023d32a7c72
To ensure the application is resumed at the vector table, set the RVBAR
accordingly.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
swbeta2 commit 8e824dfe3b169461916c0190194a3eb5a7810b1a
xilpm provides a set of APIs which can be used by standalone applications
to call in PMUFW power management APIs via IPI. Self-suspend example is
provided to demonstrate the usage of this library.
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
Support for decryption of images added.
Authentication and decryption now use secure library APIs.
csu dma driver APIs are used now.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
Driverwide, scripted change to convert 3-line
comments to single line comments.
Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
Driverwide, scripted change to convert 3-line comments
to single line comments.
Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
