There is a bug wherein the DMA listening to RX empty status goes busy
if RX FIFO clear bit is set in the FIFO control register, even if there
is no transfer request. So switch to I/O mode always to clear RX FIFO and
restore the mode in the end.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
This is the initial version of Inter Processor Interrupt (IPI) driver
for ZynqMP,including the required tcl and an example on using the driver.
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
The existing changes done under EXTENDED_DESC_MODE should in fact
be done for arch 64. Extended mode needs additional BD words and since
there is no test for it at present, it is disabled.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Enable jumbo option and use updated API's for zynqmp.
Increase array size to support jumbo frames - these can be decreased by user if
not required.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Add an option to enable jumbo frames for zynqmp.
Add frame size and receive buffer length masks to instance so that they can
be updated dynamically with jumbo enable/disable.
Provide new API XEmacPs_GetRxFrameSize instead of XEmacPs_BdGetLength to
find frame size in case of jumbo frames or otherwise.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
This patch documented the parameters of XQspiPsu_SelectFlash API
to remove doxygen warnings and modified the xqspipsu.h file
header as number of characters in a line are more than usual.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch does following things
1. Added IO mode support for qspipsu.
2. Modified the GenFifoEntryData API since unaligned data should
be the last entry in GenFifo.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Ensure that the dma buffer boundary interrupt is disabled as driver
is using the contiguous buffer for the whole page size and enabling
this interrupt would cause failures if the buffer boundary is
configured for other values (not the page size)
Signed-off-by: Shakti Bhatnagar <shaktib@xilinx.com>
Added interlaced and progressive mode switching functionality.
Removed XVtc_RegUpdate as there were 2 APIS with same functionality
provided backward compatibility.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
This patch removes the IAR compilation errors.
Modified the OnfiNand_Geometry structure declaration according to IAR compiler
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Modified driver source file to remove compiler warning.
1. Did Type Conversion
2. Made two API's public
3. Removed redeclaration
Signed-off-by: Shakti Bhatnagar <shaktib@xilinx.com>
Bit 21 of DPTX register PHY_CONFIG (0x200) enables 8b10b encoding.
In v6.0 of the DPTX core, the default value is '1'.
Current driver should keep this value untouched when writing to the PHY_CONFIG
register.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This patch changes to psu from pss for processor instance to create
CPU ID in xparameters.h
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This patch modifies eeprom start address in polled example and
updated the note in header in repeated start example.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch implemented the large data transfer using repeated
start in Zynq Ultra Scale MP and fixed doxygen warnings.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch added check for SLCR lock before doing the SLCR
reset. If it is unlocked we ahould not lock after reset.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Kept only psu_nand as supported_peripherals for Zynq UltraScale MP Generic
NAND controller driver.
Removed pss_nand and ps8_nand from supported_peripherals.
Signed-off-by: Shakti Bhatnagar <shaktib@xilinx.com>
