There are 4 filter coefficient tables available. The table to be
loaded in IP register bank is determined by the scaling ratio
Scale Up: Always use 6tap
Scale Dn: Different table selected based on scaling ratio
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
There are 4 Filter coefficient tables available. The table to be
loaded in the IP is determined by the scaling ratio
Scale Up: Always use 6tap
Scale Dn: Different table selected based on scaling ration
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Updated API name to load external coefficients to align with
vprocss
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Updated API name to load external coefficients to align with
vprocss update.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Modify example to use the first available IPI device slot
for testing
Signed-off-by: Jyotheeswar Reddy <jyothee@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
When DRE is not enabled,adjust hsize and stride to memap data width on write channel(S2MM).
On read channel(mm2s), adjust hsize to stream data width and stride to memap data width.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the test_app tcl file so that polled,
interrupt tests are removed from the peripheral tests.
Since we dont know whether peripherals are connected to
SPIPS or not.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies the test_app tcl file so that polled,
interrupt tests are removed from the peripheral tests.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This patch changes openamp rpc demo application linker script
to keep everything in DDR except vectors. It fixes the order
of text carve out memory.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-for-series: Anirudha Sarangi <anirudh@xilinx.com>
This patch changes linker script to keep everything into DDR
except vectors. It removes frequent call to enable interrupt
and removed disable interrupt in between. It also fixes the
order of text carve out entry.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-for-series: Anirudha Sarangi <anirudh@xilinx.com>
This patch updates the FreeRTOS Hello World Demo application to
make it more meaningful. Also it updates the tcl to make it work for
R5, A9 and MicroBlaze.
Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
For CortexA9, the tcl was exporting a wrong hash define to clear
the interrupts. This patch fixes that issue.
Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
The existing mld file has incorrect tick_setup category. The patch
fixes it. The patch also does some cleanup to remove unnecessary
comments.
Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Currently R5 applications are handedoff immediately after they are loaded.
This feature is configurable in FSBL and now with this change, early handoff
is disabled by default. User can enable this feature again by defining
FSBL_EARLY_HANDOFF_EXCLUDE_VAL as 1.
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
This patch updates the Xil_SetTlbAttributes to mark the BD memory region
only uncaheable and updated the cache flush/invalidate api's for a53 case.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
-Updated driver structure, variable and API names to align with
defined coding guidelines
-Load scalers and chroma resampler coefficients only if the
instantiated configuration supports it
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
Coefficient register base address offset changed in IP from
0x400 to 0x800 to accomodate all supported taps.
Split Phase and Coefficient programming logic in 2 independent
API's. For Bicubic and Bilinear scalers only Phase needs to
be programmed.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
Coefficient register base address offset changed in IP from 0x400 to
0x800 to accomodate all supported taps.
Split Phase and Coefficient programming logic in 2 independent
API's. For Bicubic and Bilinear scalers only Phase needs to be
programmed.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
Added enumeration for supported resampling algorithms.
Coefficients needs to be programmed only for FIR mode. Bounded
coefficient programmin API with required condition.
Updated debug API to report resampler type and associated
coefficients
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
Added enumerations to describe supported resampling algorithms
Only FIR mode needs the programmable coeffiecients. Bounded the
coefficient programming API with the required condition.
Also updated debug API to report out the resampling type and
associated coefficients
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
IP bus name prefix changed from "AXILITES" to "CTRL" to align
with all other HLS IP's in video processing subsystem. Generated
driver updated.
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
Removing NULL checking asserts for the data buffers where 0x00 is a possible
location. This will resolve the assert failures in xilsecure.
Signed-off-by: Bhavik Ameta <bameta@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This patch updates the iomodule tcl to handle, if iomodule doesn't
have interrupts enabled and also updates the canonical defines for
iomodule GPO*,INTC_LEVEL_EDGE,INTC_POSITIVE.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
This patch fixes the wrong ifdef in the example.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
This patch updates the Xil_SetTlbAttributes
to mark the BD memory region only uncaheable and
updated the cache flush/invalidate api's for a53 case.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Reviewed-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
This patch modifies openamp matrix multiply application tcl file
to check if OS is standalone or freertos for which the application
is being built
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
In a53 processor the Cache flush api does both fulsh and invalidate
of the memory once the dma transfer is done before checking the
data we shouldn't invalidate the memory unlike the a9/microblaze case.
This patch updates the axidma examples for the same.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
In a53 processor the Cache flush api does both fulsh and invalidate
of the memory once the dma transfer is done before checking the
data we shouldn't invalidate the memory unlike the a9/microblaze case
this patch updates the axicdma examples for the same.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Should be called from application instead.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This patch modifies the makefile by removing the unnecessary
compiler checks. With the latest compiler names, this check
is not required.
Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
Acked By: Sadanand Mutyala <sadanan@xilinx.com>
This patch modifies openamp rpc demo to support the latest kernel
changes by modifying IPI channel bit mask, moving the code to DDR
from 0xfffc0000 to avoid conflict with ATF
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies openamp echo test to support the latest kernel
changes by modifying IPI channel bit mask, moving the code to DDR
from 0xfffc0000 to avoid conflict with ATF
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies openamp matrix multiply application to pick
correct linker script for baremetal and freertos. This patch
also modifies linker scripts to put the data into DDR instead
of part of OCM where ATF lies. This patch modifies IPI mask in
openamp application to support it with latest linux changes
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies openamp library to include missing header
files to bm_env.c for freertos.
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This patch modifies asm_vectors in freertos R5 to put the vectors
beyond 32MB from code
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
With the 64-bit support a new filed got added to the buffer
descriptor the number of words in a buffer desctipor
should be changed accordingly. This patch updates the same.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This patch fixes the bsp compilation errors when elite is configured
with interrupts though a concat IP.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
Error out from tcl when A53 32 bit compiler is used as lwip
library does not support it.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
During an unplug event, the clock may not be stable which will
cause the disable function to stall.
Removing the wait for the encryption function to finish after the
cipher has been disabled will not affect functionality.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked by: Rohit Consul <rohitco@xilinx.com>
