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7e0848b7d5
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dma: throw exception in makeAccesibleFromVA instead of returning bool
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2022-10-28 08:16:58 -04:00 |
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894460cd7b
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intc: fix VLNV for Niklas' new bistream
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2022-10-28 08:05:48 -04:00 |
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2d21432a5f
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aurora: fix names of AXI-S interfaces
|
2022-10-28 08:05:30 -04:00 |
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0e0197a3be
|
fix coding style
|
2022-10-28 08:03:57 -04:00 |
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7ccb23d8b4
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remove old C code
|
2022-10-28 02:18:21 -04:00 |
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72cfade589
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dma: start implementing scatter-gather support
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2022-10-27 06:02:45 -04:00 |
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9ef01d068e
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update year in copyright notices
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2022-08-30 12:22:40 -04:00 |
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fb824a82f9
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cleanup of comments
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2022-08-30 12:21:46 -04:00 |
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5c68a22ffe
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add new IP core for standard Xilinx Aurora cores
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2022-08-30 12:21:46 -04:00 |
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f2a1c78f96
|
harmonize logger names
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2022-08-30 12:21:45 -04:00 |
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49572d0a74
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adapt to new plugin registry
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2022-03-04 03:33:07 -05:00 |
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e5545aa17e
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emc: add initial code to flash FPGA bitstream via PCIe
|
2020-07-08 17:16:43 +02:00 |
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08114652d6
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emc: add stub IP
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2020-07-08 15:20:05 +02:00 |
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c5e3d3dd4a
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node: add connect() with reverse path
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2020-06-15 21:21:16 +02:00 |
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6c225c8fae
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update VILLAScommon submodule
|
2020-06-15 21:21:05 +02:00 |
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74f55fa98c
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refactor: more code-style improvements
|
2020-06-15 21:08:49 +02:00 |
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8b7bbe27c6
|
refactor: whitespaces for references
|
2020-06-14 22:03:50 +02:00 |
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6b3164dd26
|
refactor IpNode and IpCore class names
|
2020-06-12 00:05:03 +02:00 |
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7c92a30ab4
|
several cleanups and bugfixes
|
2020-06-11 23:55:05 +02:00 |
|
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bb8a711f02
|
use new getter for graph
|
2020-06-11 23:40:12 +02:00 |
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b7e5bfead2
|
harmonize codestyle
|
2020-06-11 18:38:46 +02:00 |
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77b55f65f7
|
use new plugin mechanism
|
2020-06-11 18:19:03 +02:00 |
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d5b1012b75
|
intc: fix name of register space
|
2020-06-11 15:57:05 +02:00 |
|
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6882e9d418
|
harmonize code-style with VILLAScommon/node
|
2020-06-11 14:26:38 +02:00 |
|
|
c906116d86
|
update to latest VILLAScommon submodule
|
2020-06-11 14:20:33 +02:00 |
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3b28eea7d2
|
aurora_axis: add two functions to reset counters and configure loopback mode
|
2020-06-11 13:08:42 +02:00 |
|
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3d15323376
|
aurora_axis: harmonize with HDL changes
|
2020-06-11 13:01:27 +02:00 |
|
Hatim Kanchwala
|
4005a0b40e
|
Merge branch 'master' of git.rwth-aachen.de:acs/public/villas/VILLASfpga
|
2020-06-02 00:54:54 +02:00 |
|
Hatim Kanchwala
|
bf67a2e5f0
|
Add initial Aurora driver
|
2020-06-02 00:54:31 +02:00 |
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02f60eb86e
|
add a writeMemory function to IpCore class
|
2020-05-26 15:24:15 +02:00 |
|
Hatim Kanchwala
|
73e85f2e5a
|
Add intial header file for Aurora
|
2020-05-26 14:46:35 +02:00 |
|
|
f6a78bea69
|
dma: add dump() method
|
2019-08-15 13:54:58 +02:00 |
|
Hatim Kanchwala
|
bf74db8e79
|
Debug update
|
2019-06-24 12:11:44 -04:00 |
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2112038d70
|
Merge branch 'feature/hls-rtds2gpu' into develop
|
2018-08-21 13:51:32 +02:00 |
|
|
76b1695586
|
move more code to VILLAScommon repo
|
2018-08-21 13:27:04 +02:00 |
|
|
df89b63368
|
fix include paths
|
2018-08-21 11:07:53 +02:00 |
|
Daniel Krebs
|
b2698c8bd5
|
rtds2gpu: update register type to work for more complex payloads
|
2018-07-26 16:49:06 +02:00 |
|
Daniel Krebs
|
0cdc05c3d5
|
rtds2gpu: add struct for memory layout of rtds2gpu buffer
|
2018-07-11 16:06:48 +02:00 |
|
|
7409d2024d
|
add more copyright / license headers
|
2018-06-25 17:03:09 +02:00 |
|
|
7fd6599ea6
|
update copyright years
|
2018-06-25 15:33:14 +02:00 |
|
Daniel Krebs
|
d853d5e0d3
|
wip GPU RTT
|
2018-06-06 09:55:14 +02:00 |
|
Daniel Krebs
|
49f0c2e0c4
|
unit test RTT via CPU to/from RTDS works!
|
2018-06-04 19:06:36 +02:00 |
|
Daniel Krebs
|
92bfe849b4
|
ips/rtds2gpu: use new connect interface
|
2018-06-04 17:36:36 +02:00 |
|
Daniel Krebs
|
f413712b86
|
gpu2rtds: unit test working
|
2018-06-04 17:36:36 +02:00 |
|
Daniel Krebs
|
010e0c3681
|
hls: add base HLS IP and enable virtual multi-inheritance
Virtual inheritance is required because (for example) the Rtds2Gpu
IP inherits from Hls and IpNode who both inherit from IpCore.
|
2018-06-04 17:36:36 +02:00 |
|
Daniel Krebs
|
5c67dc3727
|
rtds2gpu: update vlnv to match v1.1 and adapt config to new bitstream
|
2018-06-04 17:36:15 +02:00 |
|
Daniel Krebs
|
28458fdf8a
|
update rtds2gpu HLS IP to v1.1
- better tested IP (testbenches)
- detect invalid frame sizes
- more status reporting
|
2018-06-04 17:36:15 +02:00 |
|
Daniel Krebs
|
bf286568dd
|
rtds2gpu IP works
|
2018-06-04 17:36:15 +02:00 |
|
Daniel Krebs
|
47bd186f5e
|
ip-node: move stream graph to IpNode and add easy-to-use connect interface
|
2018-06-04 17:31:12 +02:00 |
|
Daniel Krebs
|
28143e7188
|
ips/rtds: add C++ version of RTDS IP
|
2018-06-04 14:20:06 +02:00 |
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