mcap: linux: Improve error info..

This patch updates the error information
message in the driver so that it will error out
with detailed info so that it will be clear to the users
incase of path to bitstreams is incorrect.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>

ThirdParty/bsp/freertos823_xilinx/data/freertos823_xilinx.mld

@@ -18,13 +18,13 @@
 #
 
 OPTION psf_version = 2.1.0 ;
-BEGIN OS freertos821_xilinx
+BEGIN OS freertos823_xilinx
 
 OPTION DRC = FreeRTOS_drc ;
-OPTION supported_peripherals =  (microblaze ps7_cortexa9 psu_cortexr5);
+OPTION supported_peripherals =  (microblaze ps7_cortexa9 psu_cortexr5 psu_cortexa53);
 OPTION COPYFILES = all;
-OPTION NAME = freertos821_xilinx;
-OPTION DEPENDS = (standalone_v5_2);
+OPTION NAME = freertos823_xilinx;
+OPTION DEPENDS = (standalone_v5_3);
 OPTION APP_LINKER_FLAGS = "-Wl,--start-group,-lxil,-lfreertos,-lgcc,-lc,--end-group";
 OPTION DESC = "FreeRTOS is a market leading open source RTOS";
 
@@ -38,10 +38,10 @@ BEGIN CATEGORY kernel_behavior
 	PARAM name = use_preemption, type = bool, default = true, desc = "Set to true to use the preemptive scheduler, or false to use the cooperative scheduler.";
 	PARAM name = tick_rate, type = int, default = 100, desc = "Number of RTOS ticks per sec";
 	PARAM name = idle_yield, type = bool, default = true, desc = "Set to true if the Idle task should yield if another idle priority task is able to run, or false if the idle task should always use its entire time slice unless it is preempted.";
-	PARAM name = max_priorities, type = int, default = 4, desc = "The number of task priorities that will be available.  Priorities can be assigned from zero to (max_priorities - 1)";
-	PARAM name = minimal_stack_size, type = int, default = 180, desc = "The size of the stack allocated to the Idle task. Also used by standard demo and test tasks found in the main FreeRTOS download.";
-	PARAM name = total_heap_size, type = int, default = 32768, desc = "Sets the amount of RAM reserved for use by FreeRTOS - used when tasks, queues, semaphores and event groups are created.";
-	PARAM name = max_task_name_len, type = int, default = 8, desc = "The maximum number of characters that can be in the name of a task.";
+	PARAM name = max_priorities, type = int, default = 8, desc = "The number of task priorities that will be available.  Priorities can be assigned from zero to (max_priorities - 1)";
+	PARAM name = minimal_stack_size, type = int, default = 200, desc = "The size of the stack allocated to the Idle task. Also used by standard demo and test tasks found in the main FreeRTOS download.";
+	PARAM name = total_heap_size, type = int, default = 65536, desc = "Sets the amount of RAM reserved for use by FreeRTOS - used when tasks, queues, semaphores and event groups are created.";
+	PARAM name = max_task_name_len, type = int, default = 10, desc = "The maximum number of characters that can be in the name of a task.";
 	PARAM name = use_timeslicing, type = bool, default = true, desc = "When true equal priority ready tasks will share CPU time with a context switch on each tick interrupt.";
 	PARAM name = use_port_optimized_task_selection, type = bool, default = true, desc ="When true task selection will be faster at the cost of limiting the maximum number of unique priorities to 32.";
 END CATEGORY

ThirdParty/bsp/freertos823_xilinx/data/freertos823_xilinx.mss

@@ -20,7 +20,7 @@
 PARAMETER VERSION = 2.2.0
 
 BEGIN OS
- PARAMETER OS_NAME = freertos821_xilinx
+ PARAMETER OS_NAME = freertos823_xilinx
  PARAMETER STDIN =  *
  PARAMETER STDOUT = *
  PARAMETER SYSTMR_SPEC = true

ThirdParty/bsp/freertos823_xilinx/data/freertos823_xilinx.tcl

@@ -19,7 +19,7 @@
 
 
 # standalone bsp version. set this to the latest "ACTIVE" version.
-set standalone_version standalone_v5_2
+set standalone_version standalone_v5_3
 
 proc FreeRTOS_drc {os_handle} {
 
@@ -42,14 +42,17 @@ proc generate {os_handle} {
 	set hw_proc_handle [hsi::get_cells [common::get_property HW_INSTANCE $sw_proc_handle] ]
 	set proctype [common::get_property IP_NAME $hw_proc_handle]
 	set need_config_file "false"
-
-	# proctype should be "microblaze", ps7_cortexa9 or psu_cortexr5
+	set enable_sw_profile [common::get_property CONFIG.enable_sw_intrusive_profiling $os_handle]
+	# proctype should be "microblaze", ps7_cortexa9, psu_cortexr5 or psu_cortexa53
 	set commonsrcdir "../${standalone_version}/src/common"
 	set mbsrcdir "../${standalone_version}/src/microblaze"
 	set armr5srcdir "../${standalone_version}/src/cortexr5"
 	set armr5gccdir "../${standalone_version}/src/cortexr5/gcc"
 	set arma53srcdir "../${standalone_version}/src/cortexa53"
-	set arma53gccdir "../${standalone_version}/src/cortexa53/gcc"
+	set arma5364srcdir "../${standalone_version}/src/cortexa53/64bit"
+	set arma5332srcdir "../${standalone_version}/src/cortexa53/32bit"
+	set arma5364gccdir "../${standalone_version}/src/cortexa53/64bit/gcc"
+	set arma5332gccdir "../${standalone_version}/src/cortexa53/32bit/gcc"
 	set includedir "../${standalone_version}/src/cortexa53/includes_ps"
 	set arma9srcdir "../${standalone_version}/src/cortexa9"
 	set arma9gccdir "../${standalone_version}/src/cortexa9/gcc"
@@ -76,7 +79,10 @@ proc generate {os_handle} {
 
 				file copy -force $includedir "../${standalone_version}/src/"
 				file delete -force "../${standalone_version}/src/gcc"
-
+				file delete -force "../${standalone_version}/src/profile"
+				if { $enable_sw_profile == "true" } {
+					error "ERROR: Profiling is not supported for R5"
+				}
 				set need_config_file "true"
 
 				set file_handle [::hsi::utils::open_include_file "xparameters.h"]
@@ -84,7 +90,36 @@ proc generate {os_handle} {
 				puts $file_handle ""
 				close $file_handle
 			}
+		"psu_cortexa53"  {
+				set procdrv [hsi::get_sw_processor]
+			        set compiler [get_property CONFIG.compiler $procdrv]
+				if {[string compare -nocase $compiler "arm-none-eabi-gcc"] == 0} {
+					error "ERROR: FreeRTOS is not supported for 32bit A53"
+				}
+				puts "In start copy psu_cortexa53"
+				file copy -force "./src/Makefile_psu_cortexa53" "./src/Makefile"
+				file copy -force "./src/Makefile" "./src/Makefile_dep"
+				foreach entry [glob -nocomplain [file join $arma5364srcdir *]] {
+					file copy -force $entry [file join ".." "${standalone_version}" "src"]
+				}
 
+				foreach entry [glob -nocomplain [file join $arma5364gccdir *]] {
+					file copy -force $entry [file join ".." "${standalone_version}" "src"]
+				}
+
+				file copy -force $includedir "../${standalone_version}/src/"
+				file delete -force "../${standalone_version}/src/gcc"
+				file delete -force "../${standalone_version}/src/profile"
+				if { $enable_sw_profile == "true" } {
+					error "ERROR: Profiling is not supported for A53"
+				}
+				set need_config_file "true"
+
+				set file_handle [::hsi::utils::open_include_file "xparameters.h"]
+				puts $file_handle "#include \"xparameters_ps.h\""
+				puts $file_handle ""
+				close $file_handle
+			}
 		"ps7_cortexa9"  {
 				puts "In start copy ps7_cortexa9"
 				file copy -force "./src/Makefile_ps7_cortexa9" "./src/Makefile"
@@ -99,7 +134,8 @@ proc generate {os_handle} {
 				}
 
 				file delete -force "../${standalone_version}/src/gcc"
-
+				file delete -force "../${standalone_version}/src/iccarm"
+				file delete -force "../${standalone_version}/src/armcc"
 				set need_config_file "true"
 
 				set file_handle [::hsi::utils::open_include_file "xparameters.h"]
@@ -131,7 +167,7 @@ proc generate {os_handle} {
 	set makeconfig [open "../${standalone_version}/src/config.make" w]
 	file rename -force -- "../${standalone_version}/src/Makefile" "../${standalone_version}/src/Makefile_depends"
 
-	if { $proctype == "psu_cortexr5" || $proctype == "ps7_cortexa9" || $proctype == "microblaze" } {
+	if { $proctype == "psu_cortexr5" || $proctype == "ps7_cortexa9" || $proctype == "microblaze" || $proctype == "psu_cortexa53" } {
 		puts $makeconfig "LIBSOURCES = *.c *.S"
 		puts $makeconfig "LIBS = standalone_libs"
 	}
@@ -141,6 +177,7 @@ proc generate {os_handle} {
 	# Remove arm directory...
 	file delete -force $armr5srcdir
 	file delete -force $arma9srcdir
+	file delete -force $arma5364srcdir
 	file delete -force $mbsrcdir
 
 	# Copy core kernel files to the main src directory
@@ -158,6 +195,13 @@ proc generate {os_handle} {
 		file copy -force [file join src Source portable GCC ARM_CR5 portmacro.h] ./src
 		file copy -force [file join src Source portable GCC ARM_CR5 portZynqUltrascale.c] ./src
 	}
+	if { $proctype == "psu_cortexa53" } {
+		file copy -force [file join src Source portable GCC ARM_CA53 port.c] ./src
+		file copy -force [file join src Source portable GCC ARM_CA53 portASM.S] ./src
+		file copy -force [file join src Source portable GCC ARM_CA53 port_asm_vectors.S] ./src
+		file copy -force [file join src Source portable GCC ARM_CA53 portmacro.h] ./src
+		file copy -force [file join src Source portable GCC ARM_CA53 portZynqUltrascale.c] ./src
+	}
 
 	if { $proctype == "ps7_cortexa9" } {
 		file copy -force [file join src Source portable GCC ARM_CA9 port.c] ./src
@@ -226,7 +270,6 @@ proc generate {os_handle} {
 	file delete -force $armr5srcdir
 	file delete -force $armr5gccdir
 	file delete -force $arma53srcdir
-	file delete -force $arma53gccdir
 	file delete -force $arma9srcdir
 	file delete -force $arma9gccdir
 	file delete -force $arma9armccdir
@@ -313,13 +356,6 @@ proc generate {os_handle} {
 		xput_define $config_file "configUSE_TRACE_FACILITY" "1"
 	}
 
-	set val [common::get_property CONFIG.use_task_notifications $os_handle]
-	if {$val == "false"} {
-		xput_define $config_file "configUSE_TASK_NOTIFICATIONS" "0"
-	} else {
-		xput_define $config_file "configUSE_TASK_NOTIFICATIONS" "1"
-	}
-
 	xput_define $config_file "configUSE_16_BIT_TICKS"		   "0"
 	xput_define $config_file "configUSE_APPLICATION_TASK_TAG"   "0"
 	xput_define $config_file "configUSE_CO_ROUTINES"			"0"
@@ -352,7 +388,7 @@ proc generate {os_handle} {
 	if {$val == "false"} {
 		xput_define $config_file "configTIMER_TASK_PRIORITY"  "0"
 	} else {
-		xput_define $config_file "configTIMER_TASK_PRIORITY"  "1"
+		xput_define $config_file "configTIMER_TASK_PRIORITY"  $val
 	}
 
 	set val [common::get_property CONFIG.timer_command_queue_length $os_handle]
@@ -366,21 +402,7 @@ proc generate {os_handle} {
 	if {$val == "false"} {
 		xput_define $config_file "configTIMER_TASK_STACK_DEPTH"  "0"
 	} else {
-		xput_define $config_file "configTIMER_TASK_STACK_DEPTH"  $min_stack
-	}
-
-	set val [common::get_property CONFIG.use_newlib_reent $os_handle]
-	if {$val == "false"} {
-		xput_define $config_file "configUSE_NEWLIB_REENTRANT"  "0"
-	} else {
-		xput_define $config_file "configUSE_NEWLIB_REENTRANT"  "1"
-	}
-
-	set val [common::get_property CONFIG.use_timeslicing $os_handle]
-	if {$val == "false"} {
-		xput_define $config_file "configUSE_TIME_SLICING"  "0"
-	} else {
-		xput_define $config_file "configUSE_TIME_SLICING"  "1"
+		xput_define $config_file "configTIMER_TASK_STACK_DEPTH"  "($val * 2)"
 	}
 
 	set val [get_property CONFIG.use_freertos_asserts $os_handle]
@@ -429,28 +451,18 @@ proc generate {os_handle} {
 		xput_define $config_file "configNUM_THREAD_LOCAL_STORAGE_POINTERS"  $val
 	}
 
+	puts $config_file "#define configUSE_TICKLESS_IDLE	0"
 	puts $config_file "#define configTASK_RETURN_ADDRESS    NULL"
-
 	puts $config_file "#define INCLUDE_vTaskPrioritySet             1"
 	puts $config_file "#define INCLUDE_uxTaskPriorityGet            1"
 	puts $config_file "#define INCLUDE_vTaskDelete                  1"
-	puts $config_file "#define INCLUDE_vTaskCleanUpResources        0"
+	puts $config_file "#define INCLUDE_vTaskCleanUpResources        1"
 	puts $config_file "#define INCLUDE_vTaskSuspend                 1"
 	puts $config_file "#define INCLUDE_vTaskDelayUntil              1"
 	puts $config_file "#define INCLUDE_vTaskDelay                   1"
-	puts $config_file "#define INCLUDE_uxTaskGetStackHighWaterMark  1"
-	puts $config_file "#define INCLUDE_xTaskGetSchedulerState       1"
-	puts $config_file "#define INCLUDE_xTimerGetTimerTaskHandle     1"
-	puts $config_file "#define INCLUDE_xTaskGetIdleTaskHandle       1"
-	puts $config_file "#define INCLUDE_xQueueGetMutexHolder         1"
 	puts $config_file "#define INCLUDE_eTaskGetState                1"
-	puts $config_file "#define INCLUDE_xEventGroupSetBitFromISR     1"
 	puts $config_file "#define INCLUDE_xTimerPendFunctionCall       1"
 	puts $config_file "#define INCLUDE_pcTaskGetTaskName            1"
-	puts $config_file "#define INCLUDE_xTaskResumeFromISR           1"
-	puts $config_file "#define INCLUDE_xTaskGetCurrentTaskHandle    1"
-	puts $config_file "#define INCLUDE_xSemaphoreGetMutexHolder     1"
-
 
 	############################################################################
 	## Add constants specific to the psu_cortexr5
@@ -586,6 +598,11 @@ proc generate {os_handle} {
 		puts $config_file "#define configSETUP_TICK_INTERRUPT() FreeRTOS_SetupTickInterrupt()\n"
 		puts $config_file "void FreeRTOS_ClearTickInterrupt( void );"
 		puts $config_file "#define configCLEAR_TICK_INTERRUPT()	FreeRTOS_ClearTickInterrupt()\n"
+		puts $config_file "#define configGENERATE_RUN_TIME_STATS 0\n"
+		puts $config_file "#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\n"
+		puts $config_file "#define portGET_RUN_TIME_COUNTER_VALUE()\n"
+		puts $config_file "#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2096\n"
+		puts $config_file "#define recmuCONTROLLING_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\n"
 
 		set max_api_call_interrupt_priority [common::get_property CONFIG.max_api_call_interrupt_priority $os_handle]
 		xput_define $config_file "configMAX_API_CALL_INTERRUPT_PRIORITY"   "($max_api_call_interrupt_priority)"
@@ -599,7 +616,157 @@ proc generate {os_handle} {
 	}
 	# end of if $proctype == "psu_cortexr5"
 
+	############################################################################
+	## Add constants specific to the psu_cortexa53
+	############################################################################
 
+	if { $proctype == "psu_cortexa53" } {
+
+		set val [common::get_property CONFIG.PSU_TTC0_Select $os_handle]
+		if {$val == "true"} {
+			set have_tick_timer 1
+			set val1 [common::get_property CONFIG.PSU_TTC0_Select_Cntr $os_handle]
+			if {$val1 == "0"} {
+				xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_0_DEVICE_ID"
+				xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_0_BASEADDR"
+				xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_0_INTR"
+			} else {
+				if {$val1 == "1"} {
+					xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_1_DEVICE_ID"
+					xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_1_BASEADDR"
+					xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_1_INTR"
+				} else {
+					if {$val1 == "2"} {
+						xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_2_DEVICE_ID"
+						xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_2_BASEADDR"
+						xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_2_INTR"
+					} else {
+						error "ERROR: invalid timer selected" "mdt_error"
+					}
+				}
+			}
+		}
+
+		set val [common::get_property CONFIG.PSU_TTC1_Select $os_handle]
+		if {$val == "true"} {
+		if {$have_tick_timer == 1} {
+				error "ERROR: Cannot select multiple timers for tick generation " "mdt_error"
+			} else {
+				set have_tick_timer 1
+				set val1 [common::get_property CONFIG.PSU_TTC1_Select_Cntr $os_handle]
+				if {$val1 == "0"} {
+					xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_3_DEVICE_ID"
+					xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_3_BASEADDR"
+					xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_3_INTR"
+				} else {
+					if {$val1 == "1"} {
+						xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_4_DEVICE_ID"
+						xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_4_BASEADDR"
+						xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_4_INTR"
+					} else {
+						if {$val1 == "2"} {
+							xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_5_DEVICE_ID"
+							xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_5_BASEADDR"
+							xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_5_INTR"
+						} else {
+							error "ERROR: invalid timer selected " "mdt_error"
+						}
+					}
+				}
+			}
+		}
+
+		set val [common::get_property CONFIG.PSU_TTC2_Select $os_handle]
+		if {$val == "true"} {
+			if {$have_tick_timer == 1} {
+				error "ERROR: Cannot select multiple timers for tick generation " "mdt_error"
+			} else {
+				set have_tick_timer 1
+				set val1 [common::get_property CONFIG.PSU_TTC2_Select_Cntr $os_handle]
+				if {$val1 == "0"} {
+					xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_6_DEVICE_ID"
+					xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_6_BASEADDR"
+					xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_6_INTR"
+				} else {
+					if {$val1 == "1"} {
+						xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_7_DEVICE_ID"
+						xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_7_BASEADDR"
+						xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_7_INTR"
+					} else {
+						if {$val1 == "2"} {
+							xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_8_DEVICE_ID"
+							xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_8_BASEADDR"
+							xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_8_INTR"
+						} else {
+							error "ERROR: invalid timer selected " "mdt_error"
+						}
+					}
+				}
+			}
+		}
+
+		set val [common::get_property CONFIG.PSU_TTC3_Select $os_handle]
+		if {$val == "true"} {
+			if {$have_tick_timer == 1} {
+				error "ERROR: Cannot select multiple timers for tick generation " "mdt_error"
+			} else {
+				set have_tick_timer 1
+				set val1 [common::get_property CONFIG.PSU_TTC3_Select_Cntr $os_handle]
+				if {$val1 == "0"} {
+					xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_9_DEVICE_ID"
+					xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_9_BASEADDR"
+					xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_9_INTR"
+				} else {
+					if {$val1 == "1"} {
+						xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_10_DEVICE_ID"
+						xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_10_BASEADDR"
+						xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_10_INTR"
+					} else {
+						if {$val1 == "2"} {
+							xput_define $config_file "configTIMER_ID" "XPAR_XTTCPS_11_DEVICE_ID"
+							xput_define $config_file "configTIMER_BASEADDR" "XPAR_XTTCPS_11_BASEADDR"
+							xput_define $config_file "configTIMER_INTERRUPT_ID" "XPAR_XTTCPS_11_INTR"
+						} else {
+							error "ERROR: invalid timer selected " "mdt_error"
+						}
+					}
+				}
+			}
+		}
+
+		if {$have_tick_timer == 0} {
+			error "ERROR: No tick timer selected " "mdt_error"
+		}
+		xput_define $config_file "configUNIQUE_INTERRUPT_PRIORITIES"			   "32"
+		xput_define $config_file "configINTERRUPT_CONTROLLER_DEVICE_ID"			"XPAR_SCUGIC_SINGLE_DEVICE_ID"
+		xput_define $config_file "configINTERRUPT_CONTROLLER_BASE_ADDRESS"		 "XPAR_SCUGIC_0_DIST_BASEADDR"
+		xput_define $config_file "configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET" 	"0x10000"
+
+		# Function prototypes cannot be in the common code as some compilers or
+		# ports require pre-processor guards to ensure they are not visible from
+		# assembly files.
+		puts $config_file "void vApplicationAssert( const char *pcFile, uint32_t ulLine );"
+		puts $config_file "void FreeRTOS_SetupTickInterrupt( void );"
+		puts $config_file "#define configSETUP_TICK_INTERRUPT() FreeRTOS_SetupTickInterrupt()\n"
+		puts $config_file "void FreeRTOS_ClearTickInterrupt( void );"
+		puts $config_file "#define configCLEAR_TICK_INTERRUPT()	FreeRTOS_ClearTickInterrupt()\n"
+		puts $config_file "#define configGENERATE_RUN_TIME_STATS 0\n"
+		puts $config_file "#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\n"
+		puts $config_file "#define portGET_RUN_TIME_COUNTER_VALUE()\n"
+		puts $config_file "#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2096\n"
+		puts $config_file "#define recmuCONTROLLING_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\n"
+		puts $config_file "#define fabs( x ) __builtin_fabs( x )\n"
+		set max_api_call_interrupt_priority [common::get_property CONFIG.max_api_call_interrupt_priority $os_handle]
+		xput_define $config_file "configMAX_API_CALL_INTERRUPT_PRIORITY"   "($max_api_call_interrupt_priority)"
+
+		set val [common::get_property CONFIG.use_port_optimized_task_selection $os_handle]
+		if {$val == "false"} {
+			xput_define $config_file "configUSE_PORT_OPTIMISED_TASK_SELECTION"  "0"
+		} else {
+			xput_define $config_file "configUSE_PORT_OPTIMISED_TASK_SELECTION"  "1"
+		}
+	}
+	# end of if $proctype == "psu_cortexa53"
 
 
 	############################################################################

ThirdParty/bsp/freertos823_xilinx/src/Makefile_microblaze

@@ -103,7 +103,7 @@ KERNEL_AR_OBJS = *.c *.S
 OUTS = *.o
 
 libs:	$(KERNEL_AR_OBJS)
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src libs
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src libs
 	@echo "Compiling FreeRTOS"
 	@$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $^
 	@$(ARCHIVER) -r ${LIBFREERTOS} ${OUTS}
@@ -117,14 +117,14 @@ libs:	$(KERNEL_AR_OBJS)
 
 include_standalone:
 	@echo "includes"
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src include
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
 	$(CP) -rf $(INCLUDEFILES) $(INCLUDEDIR)
 
 
 .PHONY: include
 include:
 	@echo "include"
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src include
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
 	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
 
 clean:

ThirdParty/bsp/freertos823_xilinx/src/Makefile_ps7_cortexa9

@@ -105,7 +105,7 @@ OUTS = *.o
 
 
 libs:	$(KERNEL_AR_OBJS)
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src libs
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src libs
 	@echo "Compiling FreeRTOS"
 	@$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $^
 	@$(ARCHIVER) -r ${LIBFREERTOS} ${OUTS}
@@ -119,14 +119,14 @@ libs:	$(KERNEL_AR_OBJS)
 
 include_standalone:
 	@echo "includes"
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src include
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
 	$(CP) -rf $(INCLUDEFILES) $(INCLUDEDIR)
 
 
 .PHONY: include
 include:
 	@echo "include"
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src include
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
 	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
 
 clean:

ThirdParty/bsp/freertos823_xilinx/src/Makefile_psu_cortexa53

@@ -0,0 +1,140 @@
+#
+# Copyright (C) 2012-2013 Xilinx, Inc.
+#
+# This file is part of the port for FreeRTOS made by Xilinx to allow FreeRTOS
+# to operate with Xilinx Zynq devices.
+#
+# This file is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License (version 2) as published by the
+# Free Software Foundation AND MODIFIED BY the FreeRTOS exception
+# (see text further below).
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License; if not it
+# can be viewed here: <http://www.gnu.org/licenses/>
+#
+# The following exception language was found at
+# http://www.freertos.org/a00114.html on May 8, 2012.
+#
+# GNU General Public License Exception
+#
+# Any FreeRTOS source code, whether modified or in its original release form,
+# or whether in whole or in part, can only be distributed by you under the
+# terms of the GNU General Public License plus this exception. An independent
+# module is a module which is not derived from or based on FreeRTOS.
+#
+# EXCEPTION TEXT:
+#
+# Clause 1
+#
+# Linking FreeRTOS statically or dynamically with other modules is making a
+# combined work based on FreeRTOS. Thus, the terms and conditions of the
+# GNU General Public License cover the whole combination.
+#
+# As a special exception, the copyright holder of FreeRTOS gives you permission
+# to link FreeRTOS with independent modules that communicate with FreeRTOS
+# solely through the FreeRTOS API interface, regardless of the license terms
+# of these independent modules, and to copy and distribute the resulting
+# combined work under terms of your choice, provided that
+#
+# Every copy of the combined work is accompanied by a written statement that
+# details to the recipient the version of FreeRTOS used and an offer by
+# yourself to provide the FreeRTOS source code (including any modifications
+# you may have  made) should the recipient request it.
+# The combined work is not itself an RTOS, scheduler, kernel or related product.
+# The independent modules add significant and primary functionality to FreeRTOS
+# and do not merely extend the existing functionality already present
+# in FreeRTOS.
+#
+# Clause 2
+#
+# FreeRTOS may not be used for any competitive or comparative purpose,
+# including the publication of any form of run time or compile time metric,
+# without the express permission of Real Time Engineers Ltd. (this is the norm
+# within the industry and is intended to ensure information accuracy).
+#
+
+#
+# Processor architecture
+# psu_cortexa53
+#
+ARCH = psu_cortexa53
+
+SYSTEMDIR = ../../..
+
+TOPDIR = .
+
+ARCH_PREFIX = aarch64-none-eabi
+
+#
+# gnu tools for Makefile
+#
+CC = $(ARCH_PREFIX)-gcc
+AS = aarch64-none-eabi-as
+AR = $(ARCH_PREFIX)-ar
+CP = cp
+
+ifeq ($(COMPILER) , aarch64-none-eabi-gcc)
+ EXTRA_COMPILER_FLAGS	=	+= -nostartfiles
+endif
+
+EXTRA_COMPILER_FLAGS += -march=armv8-a \
+		 -mfpu=VFPv4 \
+
+#
+# Compiler, linker and other options.
+#
+CFLAGS = ${COMPILER_FLAGS} ${EXTRA_COMPILER_FLAGS}
+
+#
+# System project directories.
+#
+LIBDIR = $(SYSTEMDIR)/lib
+INCLUDEDIR = $(SYSTEMDIR)/include
+
+# Kernel library.
+LIBFREERTOS = ${LIBDIR}/libfreertos.a
+LIBXIL = ${LIBDIR}/libxil.a
+
+INCLUDEFILES =	${TOPDIR}/*.h
+
+INCLUDES = -I$(INCLUDEDIR) \
+	-I${TOPDIR}
+
+KERNEL_AR_OBJS = *.c *.S
+
+OUTS = *.o
+
+
+
+libs:	$(KERNEL_AR_OBJS)
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src libs
+	@echo "Compiling FreeRTOS"
+	@$(COMPILER) $(COMPILER_FLAGS) $(CC_FLAG) $(EXTRA_COMPILER_FLAGS) -march=armv8-a $(INCLUDES) $^
+	@$(ARCHIVER) -r ${LIBFREERTOS} ${OUTS}
+	@$(ARCHIVER) -d ${LIBXIL} asm_vectors.o
+	@$(ARCHIVER) -s ${LIBXIL}
+
+	make clean
+
+
+
+
+include_standalone:
+	@echo "includes"
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
+	$(CP) -rf $(INCLUDEFILES) $(INCLUDEDIR)
+
+
+.PHONY: include
+include:
+	@echo "include"
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
+	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
+
+clean:
+	rm -rf ${OUTS}

ThirdParty/bsp/freertos823_xilinx/src/Makefile_psu_cortexr5

@@ -114,7 +114,7 @@ OUTS = *.o
 
 
 libs:	$(KERNEL_AR_OBJS)
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src libs
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src libs
 	@echo "Compiling FreeRTOS"
 	@$(COMPILER) $(COMPILER_FLAGS) $(CC_FLAG) $(EXTRA_COMPILER_FLAGS) -mcpu=cortex-r5 -mfpu=vfpv3-d16 -mfloat-abi=softfp $(INCLUDES) $^
 	@$(ARCHIVER) -r ${LIBFREERTOS} ${OUTS}
@@ -128,14 +128,14 @@ libs:	$(KERNEL_AR_OBJS)
 
 include_standalone:
 	@echo "includes"
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src include
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
 	$(CP) -rf $(INCLUDEFILES) $(INCLUDEDIR)
 
 
 .PHONY: include
 include:
 	@echo "include"
-	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_2/src include
+	$(MAKE) -f Makefile_depends -e "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" -C ../../standalone_v5_3/src include
 	${CP} ${INCLUDEFILES} ${INCLUDEDIR}
 
 clean:

ThirdParty/bsp/freertos823_xilinx/src/Source/event_groups.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<

ThirdParty/bsp/freertos823_xilinx/src/Source/include/FreeRTOS.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -617,6 +617,34 @@ extern "C" {
 	#define traceQUEUE_REGISTRY_ADD(xQueue, pcQueueName)
 #endif
 
+#ifndef traceTASK_NOTIFY_TAKE_BLOCK
+	#define traceTASK_NOTIFY_TAKE_BLOCK()
+#endif
+
+#ifndef traceTASK_NOTIFY_TAKE
+	#define traceTASK_NOTIFY_TAKE()
+#endif
+
+#ifndef traceTASK_NOTIFY_WAIT_BLOCK
+	#define traceTASK_NOTIFY_WAIT_BLOCK()
+#endif
+
+#ifndef traceTASK_NOTIFY_WAIT
+	#define traceTASK_NOTIFY_WAIT()
+#endif
+
+#ifndef traceTASK_NOTIFY
+	#define traceTASK_NOTIFY()
+#endif
+
+#ifndef traceTASK_NOTIFY_FROM_ISR
+	#define traceTASK_NOTIFY_FROM_ISR()
+#endif
+
+#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR
+	#define traceTASK_NOTIFY_GIVE_FROM_ISR()
+#endif
+
 #ifndef configGENERATE_RUN_TIME_STATS
 	#define configGENERATE_RUN_TIME_STATS 0
 #endif
@@ -791,6 +819,14 @@ V8 if desired. */
 	#define xList List_t
 #endif /* configENABLE_BACKWARD_COMPATIBILITY */
 
+/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even
+if floating point hardware is otherwise supported by the FreeRTOS port in use.
+This constant is not supported by all FreeRTOS ports that include floating
+point support. */
+#ifndef configUSE_TASK_FPU_SUPPORT
+	#define configUSE_TASK_FPU_SUPPORT 1
+#endif
+
 #ifdef __cplusplus
 }
 #endif

ThirdParty/bsp/freertos823_xilinx/src/Source/include/StackMacros.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -86,28 +86,10 @@
 
 /*-----------------------------------------------------------*/
 
-#if( configCHECK_FOR_STACK_OVERFLOW == 0 )
-
-	/* FreeRTOSConfig.h is not set to check for stack overflows. */
-	#define taskFIRST_CHECK_FOR_STACK_OVERFLOW()
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 0 */
-/*-----------------------------------------------------------*/
-
-#if( configCHECK_FOR_STACK_OVERFLOW == 1 )
-
-	/* FreeRTOSConfig.h is only set to use the first method of
-	overflow checking. */
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH < 0 ) )
+#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
 
 	/* Only the current stack state is to be checked. */
-	#define taskFIRST_CHECK_FOR_STACK_OVERFLOW()														\
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
 	{																									\
 		/* Is the currently saved stack pointer within the stack limit? */								\
 		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
@@ -116,13 +98,13 @@
 		}																								\
 	}
 
-#endif /* configCHECK_FOR_STACK_OVERFLOW > 0 */
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 /*-----------------------------------------------------------*/
 
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH > 0 ) )
+#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
 
 	/* Only the current stack state is to be checked. */
-	#define taskFIRST_CHECK_FOR_STACK_OVERFLOW()														\
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
 	{																									\
 																										\
 		/* Is the currently saved stack pointer within the stack limit? */								\
@@ -137,20 +119,18 @@
 
 #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
 
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()																						\
-	{																																	\
-	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
-																																		\
-																																		\
-		/* Has the extremity of the task stack ever been written over? */																\
-		if( memcmp( ( void * ) pxCurrentTCB->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )			\
-		{																																\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );									\
-		}																																\
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+		const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;							\
+		const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;											\
+																										\
+		if( ( pulStack[ 0 ] != ulCheckValue ) ||												\
+			( pulStack[ 1 ] != ulCheckValue ) ||												\
+			( pulStack[ 2 ] != ulCheckValue ) ||												\
+			( pulStack[ 3 ] != ulCheckValue ) )												\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
 	}
 
 #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
@@ -158,7 +138,7 @@
 
 #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
 
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()																						\
+	#define taskCHECK_FOR_STACK_OVERFLOW()																								\
 	{																																	\
 	int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;																		\
 	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
@@ -180,4 +160,11 @@
 #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
 /*-----------------------------------------------------------*/
 
+/* Remove stack overflow macro if not being used. */
+#ifndef taskCHECK_FOR_STACK_OVERFLOW
+	#define taskCHECK_FOR_STACK_OVERFLOW()
+#endif
+
+
+
 #endif /* STACK_MACROS_H */

ThirdParty/bsp/freertos823_xilinx/src/Source/include/croutine.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<

ThirdParty/bsp/freertos823_xilinx/src/Source/include/deprecated_definitions.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<

ThirdParty/bsp/freertos823_xilinx/src/Source/include/event_groups.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -380,7 +380,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBit
  * \ingroup EventGroup
  */
 #if( configUSE_TRACE_FACILITY == 1 )
-	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
 #else
 	#define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
 #endif
@@ -532,7 +532,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_
  * \ingroup EventGroup
  */
 #if( configUSE_TRACE_FACILITY == 1 )
-	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
+	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 #else
 	#define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
 #endif
@@ -697,7 +697,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t u
  * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR
  * \ingroup EventGroup
  */
-EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
+EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
 
 /**
  * event_groups.h
@@ -711,14 +711,14 @@ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
  *
  * @param xEventGroup The event group being deleted.
  */
-void vEventGroupDelete( EventGroupHandle_t xEventGroup );
+void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
 
 /* For internal use only. */
-void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet );
-void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear );
+void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;
+void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
 
 #if (configUSE_TRACE_FACILITY == 1)
-	UBaseType_t uxEventGroupGetNumber( void* xEventGroup );
+	UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION;
 #endif
 
 #ifdef __cplusplus

ThirdParty/bsp/freertos823_xilinx/src/Source/include/list.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -180,19 +180,19 @@ use of FreeRTOS.*/
  */
 struct xLIST_ITEM
 {
-	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 	configLIST_VOLATILE TickType_t xItemValue;			/*< The value being listed.  In most cases this is used to sort the list in descending order. */
 	struct xLIST_ITEM * configLIST_VOLATILE pxNext;		/*< Pointer to the next ListItem_t in the list. */
 	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;	/*< Pointer to the previous ListItem_t in the list. */
 	void * pvOwner;										/*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
 	void * configLIST_VOLATILE pvContainer;				/*< Pointer to the list in which this list item is placed (if any). */
-	listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 };
 typedef struct xLIST_ITEM ListItem_t;					/* For some reason lint wants this as two separate definitions. */
 
 struct xMINI_LIST_ITEM
 {
-	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 	configLIST_VOLATILE TickType_t xItemValue;
 	struct xLIST_ITEM * configLIST_VOLATILE pxNext;
 	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
@@ -206,8 +206,8 @@ typedef struct xLIST
 {
 	listFIRST_LIST_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 	configLIST_VOLATILE UBaseType_t uxNumberOfItems;
-	ListItem_t * configLIST_VOLATILE pxIndex;		/*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
-	MiniListItem_t xListEnd;						/*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
+	ListItem_t * configLIST_VOLATILE pxIndex;			/*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
+	MiniListItem_t xListEnd;							/*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
 	listSECOND_LIST_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 } List_t;
 
@@ -383,7 +383,7 @@ List_t * const pxConstList = ( pxList );													\
  * \page vListInitialise vListInitialise
  * \ingroup LinkedList
  */
-void vListInitialise( List_t * const pxList );
+void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
 
 /*
  * Must be called before a list item is used.  This sets the list container to
@@ -394,7 +394,7 @@ void vListInitialise( List_t * const pxList );
  * \page vListInitialiseItem vListInitialiseItem
  * \ingroup LinkedList
  */
-void vListInitialiseItem( ListItem_t * const pxItem );
+void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert a list item into a list.  The item will be inserted into the list in
@@ -407,7 +407,7 @@ void vListInitialiseItem( ListItem_t * const pxItem );
  * \page vListInsert vListInsert
  * \ingroup LinkedList
  */
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem );
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert a list item into a list.  The item will be inserted in a position
@@ -428,7 +428,7 @@ void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem );
  * \page vListInsertEnd vListInsertEnd
  * \ingroup LinkedList
  */
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem );
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Remove an item from a list.  The list item has a pointer to the list that
@@ -443,7 +443,7 @@ void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem );
  * \page uxListRemove uxListRemove
  * \ingroup LinkedList
  */
-UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove );
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
 
 #ifdef __cplusplus
 }

ThirdParty/bsp/freertos823_xilinx/src/Source/include/mpu_wrappers.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -103,6 +103,9 @@ only for ports that are using the MPU. */
 		#define xTaskGetSchedulerState			MPU_xTaskGetSchedulerState
 		#define xTaskGetIdleTaskHandle			MPU_xTaskGetIdleTaskHandle
 		#define uxTaskGetSystemState			MPU_uxTaskGetSystemState
+		#define xTaskGenericNotify				MPU_xTaskGenericNotify
+		#define xTaskNotifyWait					MPU_xTaskNotifyWait
+		#define ulTaskNotifyTake				MPU_ulTaskNotifyTake
 
 		#define xQueueGenericCreate				MPU_xQueueGenericCreate
 		#define xQueueCreateMutex				MPU_xQueueCreateMutex
@@ -120,19 +123,36 @@ only for ports that are using the MPU. */
 		#define xQueueSelectFromSet				MPU_xQueueSelectFromSet
 		#define xQueueAddToSet					MPU_xQueueAddToSet
 		#define xQueueRemoveFromSet				MPU_xQueueRemoveFromSet
-		#define xQueuePeekFromISR				MPU_xQueuePeekFromISR
+		#define xQueueGetMutexHolder			MPU_xQueueGetMutexHolder
 		#define xQueueGetMutexHolder			MPU_xQueueGetMutexHolder
 
 		#define pvPortMalloc					MPU_pvPortMalloc
 		#define vPortFree						MPU_vPortFree
 		#define xPortGetFreeHeapSize			MPU_xPortGetFreeHeapSize
 		#define vPortInitialiseBlocks			MPU_vPortInitialiseBlocks
+		#define xPortGetMinimumEverFreeHeapSize	MPU_xPortGetMinimumEverFreeHeapSize
 
 		#if configQUEUE_REGISTRY_SIZE > 0
 			#define vQueueAddToRegistry				MPU_vQueueAddToRegistry
 			#define vQueueUnregisterQueue			MPU_vQueueUnregisterQueue
 		#endif
 
+		#define xTimerCreate					MPU_xTimerCreate
+		#define pvTimerGetTimerID				MPU_pvTimerGetTimerID
+		#define vTimerSetTimerID				MPU_vTimerSetTimerID
+		#define xTimerIsTimerActive				MPU_xTimerIsTimerActive
+		#define xTimerGetTimerDaemonTaskHandle	MPU_xTimerGetTimerDaemonTaskHandle
+		#define xTimerPendFunctionCall			MPU_xTimerPendFunctionCall
+		#define pcTimerGetTimerName				MPU_pcTimerGetTimerName
+		#define xTimerGenericCommand			MPU_xTimerGenericCommand
+
+		#define xEventGroupCreate				MPU_xEventGroupCreate
+		#define xEventGroupWaitBits				MPU_xEventGroupWaitBits
+		#define xEventGroupClearBits			MPU_xEventGroupClearBits
+		#define xEventGroupSetBits				MPU_xEventGroupSetBits
+		#define xEventGroupSync					MPU_xEventGroupSync
+		#define vEventGroupDelete				MPU_vEventGroupDelete
+
 		/* Remove the privileged function macro. */
 		#define PRIVILEGED_FUNCTION
 

ThirdParty/bsp/freertos823_xilinx/src/Source/include/portable.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -94,6 +94,14 @@ must be set in the compiler's include path. */
 	#include "portmacro.h"
 #endif
 
+#if portBYTE_ALIGNMENT == 32
+	#define portBYTE_ALIGNMENT_MASK ( 0x001f )
+#endif
+
+#if portBYTE_ALIGNMENT == 16
+	#define portBYTE_ALIGNMENT_MASK ( 0x000f )
+#endif
+
 #if portBYTE_ALIGNMENT == 8
 	#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
 #endif
@@ -154,7 +162,7 @@ typedef struct HeapRegion
  * terminated by a HeapRegions_t structure that has a size of 0.  The region
  * with the lowest start address must appear first in the array.
  */
-void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions );
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
 
 
 /*

ThirdParty/bsp/freertos823_xilinx/src/Source/include/projdefs.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<

ThirdParty/bsp/freertos823_xilinx/src/Source/include/queue.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -1452,8 +1452,8 @@ UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEG
  * responsiveness to gain execution speed, whereas the fully featured API
  * sacrifices execution speed to ensure better interrupt responsiveness.
  */
-BaseType_t xQueueAltGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition );
-BaseType_t xQueueAltGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking );
+BaseType_t xQueueAltGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueAltGenericReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait, BaseType_t xJustPeeking ) PRIVILEGED_FUNCTION;
 #define xQueueAltSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
 #define xQueueAltSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 #define xQueueAltReceive( xQueue, pvBuffer, xTicksToWait ) xQueueAltGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdFALSE )
@@ -1676,7 +1676,7 @@ QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const Ti
 QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
 
 /* Not public API functions. */
-void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
 BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
 void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;
 UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;

ThirdParty/bsp/freertos823_xilinx/src/Source/include/semphr.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<

ThirdParty/bsp/freertos823_xilinx/src/Source/include/task.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -85,10 +85,10 @@ extern "C" {
  * MACROS AND DEFINITIONS
  *----------------------------------------------------------*/
 
-#define tskKERNEL_VERSION_NUMBER "V8.2.1"
+#define tskKERNEL_VERSION_NUMBER "V8.2.3"
 #define tskKERNEL_VERSION_MAJOR 8
 #define tskKERNEL_VERSION_MINOR 2
-#define tskKERNEL_VERSION_BUILD 1
+#define tskKERNEL_VERSION_BUILD 3
 
 /**
  * task. h
@@ -1166,8 +1166,8 @@ constant. */
 	kernel does not use the pointers itself, so the application writer can use
 	the pointers for any purpose they wish.  The following two functions are
 	used to set and query a pointer respectively. */
-	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue );
-	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex );
+	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION;
+	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION;
 
 #endif
 
@@ -1191,7 +1191,7 @@ BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
  * Simply returns the handle of the idle task.  It is not valid to call
  * xTaskGetIdleTaskHandle() before the scheduler has been started.
  */
-TaskHandle_t xTaskGetIdleTaskHandle( void );
+TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
 
 /**
  * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for
@@ -1290,7 +1290,7 @@ TaskHandle_t xTaskGetIdleTaskHandle( void );
 	}
 	</pre>
  */
-UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime );
+UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
 
 /**
  * task. h
@@ -1437,30 +1437,30 @@ void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e9
  * @param eAction Specifies how the notification updates the task's notification
  * value, if at all.  Valid values for eAction are as follows:
  *
- *	eSetBits -
- *	The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
- * 	always returns pdPASS in this case.
+ * eSetBits -
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
+ * always returns pdPASS in this case.
  *
- *	eIncrement -
- *	The task's notification value is incremented.  ulValue is not used and
- *	xTaskNotify() always returns pdPASS in this case.
+ * eIncrement -
+ * The task's notification value is incremented.  ulValue is not used and
+ * xTaskNotify() always returns pdPASS in this case.
  *
- *	eSetValueWithOverwrite -
- *	The task's notification value is set to the value of ulValue, even if the
- *	task being notified had not yet processed the previous notification (the
- *	task already had a notification pending).  xTaskNotify() always returns
- *	pdPASS in this case.
+ * eSetValueWithOverwrite -
+ * The task's notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification (the
+ * task already had a notification pending).  xTaskNotify() always returns
+ * pdPASS in this case.
  *
- *	eSetValueWithoutOverwrite -
- *	If the task being notified did not already have a notification pending then
- *	the task's notification value is set to ulValue and xTaskNotify() will
- *	return pdPASS.  If the task being notified already had a notification
- *	pending then no action is performed and pdFAIL is returned.
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending then
+ * the task's notification value is set to ulValue and xTaskNotify() will
+ * return pdPASS.  If the task being notified already had a notification
+ * pending then no action is performed and pdFAIL is returned.
  *
- *	eNoAction -
- *	The task receives a notification without its notification value being
- *	updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
- *	this case.
+ * eNoAction -
+ * The task receives a notification without its notification value being
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
+ * this case.
  *
  *  pulPreviousNotificationValue -
  *  Can be used to pass out the subject task's notification value before any
@@ -1472,7 +1472,7 @@ void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e9
  * \defgroup xTaskNotify xTaskNotify
  * \ingroup TaskNotifications
  */
-BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue );
+BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
 #define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL )
 #define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
 
@@ -1523,30 +1523,30 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNo
  * @param eAction Specifies how the notification updates the task's notification
  * value, if at all.  Valid values for eAction are as follows:
  *
- *	eSetBits -
- *	The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
- * 	always returns pdPASS in this case.
+ * eSetBits -
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
+ * always returns pdPASS in this case.
  *
- *	eIncrement -
- *	The task's notification value is incremented.  ulValue is not used and
- *	xTaskNotify() always returns pdPASS in this case.
+ * eIncrement -
+ * The task's notification value is incremented.  ulValue is not used and
+ * xTaskNotify() always returns pdPASS in this case.
  *
- *	eSetValueWithOverwrite -
- *	The task's notification value is set to the value of ulValue, even if the
- *	task being notified had not yet processed the previous notification (the
- *	task already had a notification pending).  xTaskNotify() always returns
- *	pdPASS in this case.
+ * eSetValueWithOverwrite -
+ * The task's notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification (the
+ * task already had a notification pending).  xTaskNotify() always returns
+ * pdPASS in this case.
  *
- *	eSetValueWithoutOverwrite -
- *	If the task being notified did not already have a notification pending then
- *	the task's notification value is set to ulValue and xTaskNotify() will
- *	return pdPASS.  If the task being notified already had a notification
- *	pending then no action is performed and pdFAIL is returned.
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending then
+ * the task's notification value is set to ulValue and xTaskNotify() will
+ * return pdPASS.  If the task being notified already had a notification
+ * pending then no action is performed and pdFAIL is returned.
  *
- *	eNoAction -
- *	The task receives a notification without its notification value being
- *	updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
- *	this case.
+ * eNoAction -
+ * The task receives a notification without its notification value being
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
+ * this case.
  *
  * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set
  * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
@@ -1563,7 +1563,9 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNo
  * \defgroup xTaskNotify xTaskNotify
  * \ingroup TaskNotifications
  */
-BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
+BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
 
 /**
  * task. h
@@ -1638,7 +1640,7 @@ BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNo
  * \defgroup xTaskNotifyWait xTaskNotifyWait
  * \ingroup TaskNotifications
  */
-BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
+BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
  * task. h
@@ -1684,7 +1686,7 @@ BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClea
  * \defgroup xTaskNotifyGive xTaskNotifyGive
  * \ingroup TaskNotifications
  */
-#define xTaskNotifyGive( xTaskToNotify ) xTaskNotify( ( xTaskToNotify ), 0, eIncrement );
+#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL )
 
 /**
  * task. h
@@ -1739,7 +1741,7 @@ BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClea
  * \defgroup xTaskNotifyWait xTaskNotifyWait
  * \ingroup TaskNotifications
  */
-void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken );
+void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
  * task. h
@@ -1808,7 +1810,23 @@ void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPri
  * \defgroup ulTaskNotifyTake ulTaskNotifyTake
  * \ingroup TaskNotifications
  */
-uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
+uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * <PRE>BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );</pre>
+ *
+ * If the notification state of the task referenced by the handle xTask is
+ * eNotified, then set the task's notification state to eNotWaitingNotification.
+ * The task's notification value is not altered.  Set xTask to NULL to clear the
+ * notification state of the calling task.
+ *
+ * @return pdTRUE if the task's notification state was set to
+ * eNotWaitingNotification, otherwise pdFALSE.
+ * \defgroup xTaskNotifyStateClear xTaskNotifyStateClear
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
 
 /*-----------------------------------------------------------
  * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
@@ -1876,7 +1894,7 @@ void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xIte
  * indefinitely, whereas vTaskPlaceOnEventList() does.
  *
  */
-void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, const TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
 
 /*
  * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
@@ -2008,7 +2026,7 @@ eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
  * For internal use only.  Increment the mutex held count when a mutex is
  * taken and return the handle of the task that has taken the mutex.
  */
-void *pvTaskIncrementMutexHeldCount( void );
+void *pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
 
 #ifdef __cplusplus
 }

ThirdParty/bsp/freertos823_xilinx/src/Source/include/timers.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -348,7 +348,7 @@ BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
  * Simply returns the handle of the timer service/daemon task.  It it not valid
  * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
  */
-TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
 
 /**
  * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
@@ -1083,7 +1083,7 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
  *	}
  * @endverbatim
  */
-BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken );
+BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
  /**
   * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
@@ -1117,7 +1117,7 @@ BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void
   * timer daemon task, otherwise pdFALSE is returned.
   *
   */
-BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait );
+BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
  * const char * const pcTimerGetTimerName( TimerHandle_t xTimer );
@@ -1128,7 +1128,7 @@ BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvPar
  *
  * @return The name assigned to the timer specified by the xTimer parameter.
  */
-const char * pcTimerGetTimerName( TimerHandle_t xTimer ); /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+const char * pcTimerGetTimerName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /*
  * Functions beyond this part are not part of the public API and are intended

ThirdParty/bsp/freertos823_xilinx/src/Source/list.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA53/port.c

@@ -0,0 +1,541 @@
+/*
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+    ***************************************************************************
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+    ***************************************************************************
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+    link: http://www.freertos.org/a00114.html
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that is more than just the market leader, it     *
+     *    is the industry's de facto standard.                               *
+     *                                                                       *
+     *    Help yourself get started quickly while simultaneously helping     *
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+     *    tutorial book, reference manual, or both:                          *
+     *    http://www.FreeRTOS.org/Documentation                              *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+    the FAQ page "My application does not run, what could be wrong?".  Have you
+    defined configASSERT()?
+
+    http://www.FreeRTOS.org/support - In return for receiving this top quality
+    embedded software for free we request you assist our global community by
+    participating in the support forum.
+
+    http://www.FreeRTOS.org/training - Investing in training allows your team to
+    be as productive as possible as early as possible.  Now you can receive
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+    Ltd, and the world's leading authority on the world's leading RTOS.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and commercial middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+/* Standard includes. */
+#include <stdlib.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+#ifndef configINTERRUPT_CONTROLLER_BASE_ADDRESS
+	#error configINTERRUPT_CONTROLLER_BASE_ADDRESS must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+#endif
+
+#ifndef configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET
+	#error configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+#endif
+
+#ifndef configUNIQUE_INTERRUPT_PRIORITIES
+	#error configUNIQUE_INTERRUPT_PRIORITIES must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+#endif
+
+#ifndef configSETUP_TICK_INTERRUPT
+	#error configSETUP_TICK_INTERRUPT() must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+#endif /* configSETUP_TICK_INTERRUPT */
+
+#ifndef configMAX_API_CALL_INTERRUPT_PRIORITY
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be defined.  See http://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html
+#endif
+
+#if configMAX_API_CALL_INTERRUPT_PRIORITY == 0
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must not be set to 0
+#endif
+
+#if configMAX_API_CALL_INTERRUPT_PRIORITY > configUNIQUE_INTERRUPT_PRIORITIES
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be less than or equal to configUNIQUE_INTERRUPT_PRIORITIES as the lower the numeric priority value the higher the logical interrupt priority
+#endif
+
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+	/* Check the configuration. */
+	#if( configMAX_PRIORITIES > 32 )
+		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+	#endif
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/* In case security extensions are implemented. */
+#if configMAX_API_CALL_INTERRUPT_PRIORITY <= ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
+	#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
+#endif
+
+/* Some vendor specific files default configCLEAR_TICK_INTERRUPT() in
+portmacro.h. */
+#ifndef configCLEAR_TICK_INTERRUPT
+	#define configCLEAR_TICK_INTERRUPT()
+#endif
+
+/* A critical section is exited when the critical section nesting count reaches
+this value. */
+#define portNO_CRITICAL_NESTING			( ( size_t ) 0 )
+
+/* In all GICs 255 can be written to the priority mask register to unmask all
+(but the lowest) interrupt priority. */
+#define portUNMASK_VALUE				( 0xFFUL )
+
+/* Tasks are not created with a floating point context, but can be given a
+floating point context after they have been created.  A variable is stored as
+part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
+does not have an FPU context, or any other value if the task does have an FPU
+context. */
+#define portNO_FLOATING_POINT_CONTEXT	( ( StackType_t ) 0 )
+
+/* Constants required to setup the initial task context. */
+#define portEL3							( ( StackType_t ) 0x0c )
+#define portSP_ELx						( ( StackType_t ) 0x01 )
+#define portSP_EL0						( ( StackType_t ) 0x00 )
+
+/* At the time of writing, the BSP only supports EL3. */
+#define portINITIAL_PSTATE				( portEL3 | portSP_EL0 )
+
+/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
+point is zero. */
+#define portBINARY_POINT_BITS			( ( uint8_t ) 0x03 )
+
+/* Masks all bits in the APSR other than the mode bits. */
+#define portAPSR_MODE_BITS_MASK			( 0x0C )
+
+/* The I bit in the DAIF bits. */
+#define portDAIF_I						( 0x80 )
+
+/* Macro to unmask all interrupt priorities. */
+#define portCLEAR_INTERRUPT_MASK()									\
+{																	\
+	portDISABLE_INTERRUPTS();										\
+	portICCPMR_PRIORITY_MASK_REGISTER = portUNMASK_VALUE;			\
+	__asm volatile (	"DSB SY		\n"								\
+						"ISB SY		\n" );							\
+	portENABLE_INTERRUPTS();										\
+}
+
+/* Hardware specifics used when sanity checking the configuration. */
+#define portINTERRUPT_PRIORITY_REGISTER_OFFSET		0x400UL
+#define portMAX_8_BIT_VALUE							( ( uint8_t ) 0xff )
+#define portBIT_0_SET								( ( uint8_t ) 0x01 )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Starts the first task executing.  This function is necessarily written in
+ * assembly code so is implemented in portASM.s.
+ */
+extern void vPortRestoreTaskContext( void );
+
+/*-----------------------------------------------------------*/
+
+/* A variable is used to keep track of the critical section nesting.  This
+variable has to be stored as part of the task context and must be initialised to
+a non zero value to ensure interrupts don't inadvertently become unmasked before
+the scheduler starts.  As it is stored as part of the task context it will
+automatically be set to 0 when the first task is started. */
+volatile uint64_t ullCriticalNesting = 9999ULL;
+
+/* Saved as part of the task context.  If ullPortTaskHasFPUContext is non-zero
+then floating point context must be saved and restored for the task. */
+uint64_t ullPortTaskHasFPUContext = pdFALSE;
+
+/* Set to 1 to pend a context switch from an ISR. */
+uint64_t ullPortYieldRequired = pdFALSE;
+
+/* Counts the interrupt nesting depth.  A context switch is only performed if
+if the nesting depth is 0. */
+uint64_t ullPortInterruptNesting = 0;
+
+/* Used in the ASM code. */
+__attribute__(( used )) const uint64_t ullICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS;
+__attribute__(( used )) const uint64_t ullICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS;
+__attribute__(( used )) const uint64_t ullICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS;
+__attribute__(( used )) const uint64_t ullMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+
+/*-----------------------------------------------------------*/
+
+/*
+ * See header file for description.
+ */
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+{
+	/* Setup the initial stack of the task.  The stack is set exactly as
+	expected by the portRESTORE_CONTEXT() macro. */
+
+	/* First all the general purpose registers. */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0101010101010101ULL;	/* R1 */
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0303030303030303ULL;	/* R3 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0202020202020202ULL;	/* R2 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0505050505050505ULL;	/* R5 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0404040404040404ULL;	/* R4 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0707070707070707ULL;	/* R7 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0606060606060606ULL;	/* R6 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0909090909090909ULL;	/* R9 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x0808080808080808ULL;	/* R8 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1111111111111111ULL;	/* R11 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1010101010101010ULL;	/* R10 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1313131313131313ULL;	/* R13 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1212121212121212ULL;	/* R12 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1515151515151515ULL;	/* R15 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1414141414141414ULL;	/* R14 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1717171717171717ULL;	/* R17 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1616161616161616ULL;	/* R16 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1919191919191919ULL;	/* R19 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x1818181818181818ULL;	/* R18 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2121212121212121ULL;	/* R21 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2020202020202020ULL;	/* R20 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2323232323232323ULL;	/* R23 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2222222222222222ULL;	/* R22 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2525252525252525ULL;	/* R25 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2424242424242424ULL;	/* R24 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2727272727272727ULL;	/* R27 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2626262626262626ULL;	/* R26 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2929292929292929ULL;	/* R29 */
+	pxTopOfStack--;
+	*pxTopOfStack = 0x2828282828282828ULL;	/* R28 */
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 0x00;	/* XZR - has no effect, used so there are an even number of registers. */
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 0x00;	/* R30 - procedure call link register. */
+	pxTopOfStack--;
+
+	*pxTopOfStack = portINITIAL_PSTATE;
+	pxTopOfStack--;
+
+	*pxTopOfStack = ( StackType_t ) pxCode; /* Exception return address. */
+	pxTopOfStack--;
+
+	/* The task will start with a critical nesting count of 0 as interrupts are
+	enabled. */
+	*pxTopOfStack = portNO_CRITICAL_NESTING;
+	pxTopOfStack--;
+
+	/* The task will start without a floating point context.  A task that uses
+	the floating point hardware must call vPortTaskUsesFPU() before executing
+	any floating point instructions. */
+	*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
+
+	return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xPortStartScheduler( void )
+{
+uint32_t ulAPSR;
+
+	#if( configASSERT_DEFINED == 1 )
+	{
+		volatile uint32_t ulOriginalPriority;
+		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + portINTERRUPT_PRIORITY_REGISTER_OFFSET );
+		volatile uint8_t ucMaxPriorityValue;
+
+		/* Determine how many priority bits are implemented in the GIC.
+
+		Save the interrupt priority value that is about to be clobbered. */
+		ulOriginalPriority = *pucFirstUserPriorityRegister;
+
+		/* Determine the number of priority bits available.  First write to
+		all possible bits. */
+		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+
+		/* Read the value back to see how many bits stuck. */
+		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+
+		/* Shift to the least significant bits. */
+		while( ( ucMaxPriorityValue & portBIT_0_SET ) != portBIT_0_SET )
+		{
+			ucMaxPriorityValue >>= ( uint8_t ) 0x01;
+		}
+
+		/* Sanity check configUNIQUE_INTERRUPT_PRIORITIES matches the read
+		value. */
+		configASSERT( ucMaxPriorityValue == portLOWEST_INTERRUPT_PRIORITY );
+
+		/* Restore the clobbered interrupt priority register to its original
+		value. */
+		*pucFirstUserPriorityRegister = ulOriginalPriority;
+	}
+	#endif /* conifgASSERT_DEFINED */
+
+
+	/* At the time of writing, the BSP only supports EL3. */
+	__asm volatile ( "MRS %0, CurrentEL" : "=r" ( ulAPSR ) );
+	ulAPSR &= portAPSR_MODE_BITS_MASK;
+	configASSERT( ulAPSR == portEL3 );
+
+	if( ulAPSR == portEL3 )
+	{
+		/* Only continue if the binary point value is set to its lowest possible
+		setting.  See the comments in vPortValidateInterruptPriority() below for
+		more information. */
+		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
+
+		if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
+		{
+			/* Interrupts are turned off in the CPU itself to ensure a tick does
+			not execute	while the scheduler is being started.  Interrupts are
+			automatically turned back on in the CPU when the first task starts
+			executing. */
+			portDISABLE_INTERRUPTS();
+
+			/* Start the timer that generates the tick ISR. */
+			configSETUP_TICK_INTERRUPT();
+
+			/* Start the first task executing. */
+			vPortRestoreTaskContext();
+		}
+	}
+
+	return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+	/* Not implemented in ports where there is nothing to return to.
+	Artificially force an assert. */
+	configASSERT( ullCriticalNesting == 1000ULL );
+}
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void )
+{
+	/* Mask interrupts up to the max syscall interrupt priority. */
+	uxPortSetInterruptMask();
+
+	/* Now interrupts are disabled ullCriticalNesting can be accessed
+	directly.  Increment ullCriticalNesting to keep a count of how many times
+	portENTER_CRITICAL() has been called. */
+	ullCriticalNesting++;
+
+	/* This is not the interrupt safe version of the enter critical function so
+	assert() if it is being called from an interrupt context.  Only API
+	functions that end in "FromISR" can be used in an interrupt.  Only assert if
+	the critical nesting count is 1 to protect against recursive calls if the
+	assert function also uses a critical section. */
+	if( ullCriticalNesting == 1ULL )
+	{
+		configASSERT( ullPortInterruptNesting == 0 );
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void )
+{
+	if( ullCriticalNesting > portNO_CRITICAL_NESTING )
+	{
+		/* Decrement the nesting count as the critical section is being
+		exited. */
+		ullCriticalNesting--;
+
+		/* If the nesting level has reached zero then all interrupt
+		priorities must be re-enabled. */
+		if( ullCriticalNesting == portNO_CRITICAL_NESTING )
+		{
+			/* Critical nesting has reached zero so all interrupt priorities
+			should be unmasked. */
+			portCLEAR_INTERRUPT_MASK();
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+void FreeRTOS_Tick_Handler( void )
+{
+	/* Must be the lowest possible priority. */
+	configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER == ( uint32_t ) ( portLOWEST_USABLE_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
+
+	/* Interrupts should not be enabled before this point. */
+	#if( configASSERT_DEFINED == 1 )
+	{
+		uint32_t ulMaskBits;
+
+		__asm volatile( "mrs %0, daif" : "=r"( ulMaskBits ) );
+		configASSERT( ( ulMaskBits & portDAIF_I ) != 0 );
+	}
+	#endif /* configASSERT_DEFINED */
+
+	/* Set interrupt mask before altering scheduler structures.   The tick
+	handler runs at the lowest priority, so interrupts cannot already be masked,
+	so there is no need to save and restore the current mask value.  It is
+	necessary to turn off interrupts in the CPU itself while the ICCPMR is being
+	updated. */
+	portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+	__asm volatile (	"dsb sy		\n"
+						"isb sy		\n" );
+
+	/* Ok to enable interrupts after the interrupt source has been cleared. */
+	configCLEAR_TICK_INTERRUPT();
+	portENABLE_INTERRUPTS();
+
+	/* Increment the RTOS tick. */
+	if( xTaskIncrementTick() != pdFALSE )
+	{
+		ullPortYieldRequired = pdTRUE;
+	}
+
+	/* Ensure all interrupt priorities are active again. */
+	portCLEAR_INTERRUPT_MASK();
+}
+/*-----------------------------------------------------------*/
+
+void vPortTaskUsesFPU( void )
+{
+	/* A task is registering the fact that it needs an FPU context.  Set the
+	FPU flag (which is saved as part of the task context). */
+	ullPortTaskHasFPUContext = pdTRUE;
+
+	/* Consider initialising the FPSR here - but probably not necessary in
+	AArch64. */
+}
+/*-----------------------------------------------------------*/
+
+void vPortClearInterruptMask( UBaseType_t uxNewMaskValue )
+{
+	if( uxNewMaskValue == pdFALSE )
+	{
+		portCLEAR_INTERRUPT_MASK();
+	}
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxPortSetInterruptMask( void )
+{
+uint32_t ulReturn;
+
+	/* Interrupt in the CPU must be turned off while the ICCPMR is being
+	updated. */
+	portDISABLE_INTERRUPTS();
+	if( portICCPMR_PRIORITY_MASK_REGISTER == ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) )
+	{
+		/* Interrupts were already masked. */
+		ulReturn = pdTRUE;
+	}
+	else
+	{
+		ulReturn = pdFALSE;
+		portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
+		__asm volatile (	"dsb sy		\n"
+							"isb sy		\n" );
+	}
+	portENABLE_INTERRUPTS();
+
+	return ulReturn;
+}
+/*-----------------------------------------------------------*/
+
+#if( configASSERT_DEFINED == 1 )
+
+	void vPortValidateInterruptPriority( void )
+	{
+		/* The following assertion will fail if a service routine (ISR) for
+		an interrupt that has been assigned a priority above
+		configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
+		function.  ISR safe FreeRTOS API functions must *only* be called
+		from interrupts that have been assigned a priority at or below
+		configMAX_SYSCALL_INTERRUPT_PRIORITY.
+
+		Numerically low interrupt priority numbers represent logically high
+		interrupt priorities, therefore the priority of the interrupt must
+		be set to a value equal to or numerically *higher* than
+		configMAX_SYSCALL_INTERRUPT_PRIORITY.
+
+		FreeRTOS maintains separate thread and ISR API functions to ensure
+		interrupt entry is as fast and simple as possible. */
+		configASSERT( portICCRPR_RUNNING_PRIORITY_REGISTER >= ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ) );
+
+		/* Priority grouping:  The interrupt controller (GIC) allows the bits
+		that define each interrupt's priority to be split between bits that
+		define the interrupt's pre-emption priority bits and bits that define
+		the interrupt's sub-priority.  For simplicity all bits must be defined
+		to be pre-emption priority bits.  The following assertion will fail if
+		this is not the case (if some bits represent a sub-priority).
+
+		The priority grouping is configured by the GIC's binary point register
+		(ICCBPR).  Writting 0 to ICCBPR will ensure it is set to its lowest
+		possible value (which may be above 0). */
+		configASSERT( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE );
+	}
+
+#endif /* configASSERT_DEFINED */
+/*-----------------------------------------------------------*/

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA53/portASM.S

@@ -0,0 +1,430 @@
+/*
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+    ***************************************************************************
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+    ***************************************************************************
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+    link: http://www.freertos.org/a00114.html
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that is more than just the market leader, it     *
+     *    is the industry's de facto standard.                               *
+     *                                                                       *
+     *    Help yourself get started quickly while simultaneously helping     *
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+     *    tutorial book, reference manual, or both:                          *
+     *    http://www.FreeRTOS.org/Documentation                              *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+    the FAQ page "My application does not run, what could be wrong?".  Have you
+    defined configASSERT()?
+
+    http://www.FreeRTOS.org/support - In return for receiving this top quality
+    embedded software for free we request you assist our global community by
+    participating in the support forum.
+
+    http://www.FreeRTOS.org/training - Investing in training allows your team to
+    be as productive as possible as early as possible.  Now you can receive
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+    Ltd, and the world's leading authority on the world's leading RTOS.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and commercial middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+	.text
+
+	/* Variables and functions. */
+	.extern ullMaxAPIPriorityMask
+	.extern pxCurrentTCB
+	.extern vTaskSwitchContext
+	.extern FreeRTOS_ApplicationIRQHandler
+	.extern ullPortInterruptNesting
+	.extern ullPortTaskHasFPUContext
+	.extern ullCriticalNesting
+	.extern ullPortYieldRequired
+	.extern ullICCEOIR
+	.extern ullICCIAR
+	.extern _freertos_vector_table
+
+	.global FreeRTOS_IRQ_Handler
+	.global FreeRTOS_SWI_Handler
+	.global vPortRestoreTaskContext
+
+
+.macro portSAVE_CONTEXT
+
+	/* Switch to use the EL0 stack pointer. */
+	MSR 	SPSEL, #0
+
+	/* Save the entire context. */
+	STP 	X0, X1, [SP, #-0x10]!
+	STP 	X2, X3, [SP, #-0x10]!
+	STP 	X4, X5, [SP, #-0x10]!
+	STP 	X6, X7, [SP, #-0x10]!
+	STP 	X8, X9, [SP, #-0x10]!
+	STP 	X10, X11, [SP, #-0x10]!
+	STP 	X12, X13, [SP, #-0x10]!
+	STP 	X14, X15, [SP, #-0x10]!
+	STP 	X16, X17, [SP, #-0x10]!
+	STP 	X18, X19, [SP, #-0x10]!
+	STP 	X20, X21, [SP, #-0x10]!
+	STP 	X22, X23, [SP, #-0x10]!
+	STP 	X24, X25, [SP, #-0x10]!
+	STP 	X26, X27, [SP, #-0x10]!
+	STP 	X28, X29, [SP, #-0x10]!
+	STP 	X30, XZR, [SP, #-0x10]!
+
+	/* Save the SPSR. */
+	MRS		X3, SPSR_EL3
+
+	/* Save the ELR. */
+	MRS		X2, ELR_EL3
+
+	STP 	X2, X3, [SP, #-0x10]!
+
+	/* Save the critical section nesting depth. */
+	LDR		X0, ullCriticalNestingConst
+	LDR		X3, [X0]
+
+	/* Save the FPU context indicator. */
+	LDR		X0, ullPortTaskHasFPUContextConst
+	LDR		X2, [X0]
+
+	/* Save the FPU context, if any (32 128-bit registers). */
+	CMP		X2, #0
+	B.EQ	1f
+	STP		Q0, Q1, [SP,#-0x20]!
+	STP		Q2, Q3, [SP,#-0x20]!
+	STP		Q4, Q5, [SP,#-0x20]!
+	STP		Q6, Q7, [SP,#-0x20]!
+	STP		Q8, Q9, [SP,#-0x20]!
+	STP		Q10, Q11, [SP,#-0x20]!
+	STP		Q12, Q13, [SP,#-0x20]!
+	STP		Q14, Q15, [SP,#-0x20]!
+	STP		Q16, Q17, [SP,#-0x20]!
+	STP		Q18, Q19, [SP,#-0x20]!
+	STP		Q20, Q21, [SP,#-0x20]!
+	STP		Q22, Q23, [SP,#-0x20]!
+	STP		Q24, Q25, [SP,#-0x20]!
+	STP		Q26, Q27, [SP,#-0x20]!
+	STP		Q28, Q29, [SP,#-0x20]!
+	STP		Q30, Q31, [SP,#-0x20]!
+
+1:
+	/* Store the critical nesting count and FPU context indicator. */
+	STP 	X2, X3, [SP, #-0x10]!
+
+	LDR 	X0, pxCurrentTCBConst
+	LDR 	X1, [X0]
+	MOV 	X0, SP   /* Move SP into X0 for saving. */
+	STR 	X0, [X1]
+
+	/* Switch to use the ELx stack pointer. */
+	MSR 	SPSEL, #1
+
+	.endm
+
+; /**********************************************************************/
+
+.macro portRESTORE_CONTEXT
+
+	/* Switch to use the EL0 stack pointer. */
+	MSR 	SPSEL, #0
+
+	/* Set the SP to point to the stack of the task being restored. */
+	LDR		X0, pxCurrentTCBConst
+	LDR		X1, [X0]
+	LDR		X0, [X1]
+	MOV		SP, X0
+
+	LDP 	X2, X3, [SP], #0x10  /* Critical nesting and FPU context. */
+
+	/* Set the PMR register to be correct for the current critical nesting
+	depth. */
+	LDR		X0, ullCriticalNestingConst /* X0 holds the address of ullCriticalNesting. */
+	MOV		X1, #255					/* X1 holds the unmask value. */
+	LDR		X4, ullICCPMRConst			/* X4 holds the address of the ICCPMR constant. */
+	CMP		X3, #0
+	LDR		X5, [X4] 					/* X5 holds the address of the ICCPMR register. */
+	B.EQ	1f
+	LDR		X6, ullMaxAPIPriorityMaskConst
+	LDR		X1, [X6]					/* X1 holds the mask value. */
+1:
+	STR		W1, [X5]					/* Write the mask value to ICCPMR. */
+	DSB 	SY							/* _RB_Barriers probably not required here. */
+	ISB 	SY
+	STR		X3, [X0]					/* Restore the task's critical nesting count. */
+
+	/* Restore the FPU context indicator. */
+	LDR		X0, ullPortTaskHasFPUContextConst
+	STR		X2, [X0]
+
+	/* Restore the FPU context, if any. */
+	CMP		X2, #0
+	B.EQ	1f
+	LDP		Q30, Q31, [SP], #0x20
+	LDP		Q28, Q29, [SP], #0x20
+	LDP		Q26, Q27, [SP], #0x20
+	LDP		Q24, Q25, [SP], #0x20
+	LDP		Q22, Q23, [SP], #0x20
+	LDP		Q20, Q21, [SP], #0x20
+	LDP		Q18, Q19, [SP], #0x20
+	LDP		Q16, Q17, [SP], #0x20
+	LDP		Q14, Q15, [SP], #0x20
+	LDP		Q12, Q13, [SP], #0x20
+	LDP		Q10, Q11, [SP], #0x20
+	LDP		Q8, Q9, [SP], #0x20
+	LDP		Q6, Q7, [SP], #0x20
+	LDP		Q4, Q5, [SP], #0x20
+	LDP		Q2, Q3, [SP], #0x20
+	LDP		Q0, Q1, [SP], #0x20
+1:
+	LDP 	X2, X3, [SP], #0x10  /* SPSR and ELR. */
+
+	/* Restore the SPSR. */
+	MSR		SPSR_EL3, X3 /*_RB_ Assumes started in EL3. */
+
+	/* Restore the ELR. */
+	MSR		ELR_EL3, X2
+
+	LDP 	X30, XZR, [SP], #0x10
+	LDP 	X28, X29, [SP], #0x10
+	LDP 	X26, X27, [SP], #0x10
+	LDP 	X24, X25, [SP], #0x10
+	LDP 	X22, X23, [SP], #0x10
+	LDP 	X20, X21, [SP], #0x10
+	LDP 	X18, X19, [SP], #0x10
+	LDP 	X16, X17, [SP], #0x10
+	LDP 	X14, X15, [SP], #0x10
+	LDP 	X12, X13, [SP], #0x10
+	LDP 	X10, X11, [SP], #0x10
+	LDP 	X8, X9, [SP], #0x10
+	LDP 	X6, X7, [SP], #0x10
+	LDP 	X4, X5, [SP], #0x10
+	LDP 	X2, X3, [SP], #0x10
+	LDP 	X0, X1, [SP], #0x10
+
+	/* Switch to use the ELx stack pointer.  _RB_ Might not be required. */
+	MSR 	SPSEL, #1
+
+	ERET
+
+	.endm
+
+
+/******************************************************************************
+ * FreeRTOS_SWI_Handler handler is used to perform a context switch.
+ *****************************************************************************/
+.align 8
+.type FreeRTOS_SWI_Handler, %function
+FreeRTOS_SWI_Handler:
+	/* Save the context of the current task and select a new task to run. */
+	portSAVE_CONTEXT
+
+	MRS		X0, ESR_EL3
+	LSR		X1, X0, #26
+	CMP		X1, #0x17 /* 0x17 = SMC instruction. */
+	B.NE	FreeRTOS_Abort
+	BL 		vTaskSwitchContext
+
+	portRESTORE_CONTEXT
+
+FreeRTOS_Abort:
+	/* Full ESR is in X0, exception class code is in X1. */
+	B		.
+
+/******************************************************************************
+ * vPortRestoreTaskContext is used to start the scheduler.
+ *****************************************************************************/
+.align 8
+.type vPortRestoreTaskContext, %function
+vPortRestoreTaskContext:
+.set freertos_vector_base,	_freertos_vector_table
+
+	/* Install the FreeRTOS interrupt handlers. */
+	LDR		X1, =freertos_vector_base
+	MSR		VBAR_EL3, X1
+	DSB		SY
+	ISB		SY
+
+	/* Start the first task. */
+	portRESTORE_CONTEXT
+
+
+/******************************************************************************
+ * FreeRTOS_IRQ_Handler handles IRQ entry and exit.
+ *****************************************************************************/
+.align 8
+.type FreeRTOS_IRQ_Handler, %function
+FreeRTOS_IRQ_Handler:
+	/* Save volatile registers. */
+	STP		X0, X1, [SP, #-0x10]!
+	STP		X2, X3, [SP, #-0x10]!
+	STP		X4, X5, [SP, #-0x10]!
+	STP		X6, X7, [SP, #-0x10]!
+	STP		X8, X9, [SP, #-0x10]!
+	STP		X10, X11, [SP, #-0x10]!
+	STP		X12, X13, [SP, #-0x10]!
+	STP		X14, X15, [SP, #-0x10]!
+	STP		X16, X17, [SP, #-0x10]!
+	STP		X18, X19, [SP, #-0x10]!
+	STP		X29, X30, [SP, #-0x10]!
+
+	/* Save the SPSR and ELR. */
+	MRS		X3, SPSR_EL3
+	MRS		X2, ELR_EL3
+	STP 	X2, X3, [SP, #-0x10]!
+
+	/* Increment the interrupt nesting counter. */
+	LDR		X5, ullPortInterruptNestingConst
+	LDR		X1, [X5]	/* Old nesting count in X1. */
+	ADD		X6, X1, #1
+	STR		X6, [X5]	/* Address of nesting count variable in X5. */
+
+	/* Maintain the interrupt nesting information across the function call. */
+	STP		X1, X5, [SP, #-0x10]!
+
+	/* Read value from the interrupt acknowledge register, which is stored in W0
+	for future parameter and interrupt clearing use. */
+	LDR 	X2, ullICCIARConst
+	LDR		X3, [X2]
+	LDR		W0, [X3]	/* ICCIAR in W0 as parameter. */
+
+	/* Maintain the ICCIAR value across the function call. */
+	STP		X0, X1, [SP, #-0x10]!
+
+	/* Call the C handler. */
+	BL FreeRTOS_ApplicationIRQHandler
+
+	/* Disable interrupts. */
+	MSR 	DAIFSET, #2
+	DSB		SY
+	ISB		SY
+
+	/* Restore the ICCIAR value. */
+	LDP		X0, X1, [SP], #0x10
+
+	/* End IRQ processing by writing ICCIAR to the EOI register. */
+	LDR 	X4, ullICCEOIRConst
+	LDR		X4, [X4]
+	STR		W0, [X4]
+
+	/* Restore the critical nesting count. */
+	LDP		X1, X5, [SP], #0x10
+	STR		X1, [X5]
+
+	/* Has interrupt nesting unwound? */
+	CMP		X1, #0
+	B.NE	Exit_IRQ_No_Context_Switch
+
+	/* Is a context switch required? */
+	LDR		X0, ullPortYieldRequiredConst
+	LDR		X1, [X0]
+	CMP		X1, #0
+	B.EQ	Exit_IRQ_No_Context_Switch
+
+	/* Reset ullPortYieldRequired to 0. */
+	MOV		X2, #0
+	STR		X2, [X0]
+
+	/* Restore volatile registers. */
+	LDP 	X4, X5, [SP], #0x10  /* SPSR and ELR. */
+	MSR		SPSR_EL3, X5 /*_RB_ Assumes started in EL3. */
+	MSR		ELR_EL3, X4
+	DSB		SY
+	ISB		SY
+
+	LDP		X29, X30, [SP], #0x10
+	LDP		X18, X19, [SP], #0x10
+	LDP		X16, X17, [SP], #0x10
+	LDP		X14, X15, [SP], #0x10
+	LDP		X12, X13, [SP], #0x10
+	LDP		X10, X11, [SP], #0x10
+	LDP		X8, X9, [SP], #0x10
+	LDP		X6, X7, [SP], #0x10
+	LDP		X4, X5, [SP], #0x10
+	LDP		X2, X3, [SP], #0x10
+	LDP		X0, X1, [SP], #0x10
+
+	/* Save the context of the current task and select a new task to run. */
+	portSAVE_CONTEXT
+	BL vTaskSwitchContext
+	portRESTORE_CONTEXT
+
+Exit_IRQ_No_Context_Switch:
+	/* Restore volatile registers. */
+	LDP 	X4, X5, [SP], #0x10  /* SPSR and ELR. */
+	MSR		SPSR_EL3, X5 /*_RB_ Assumes started in EL3. */
+	MSR		ELR_EL3, X4
+	DSB		SY
+	ISB		SY
+
+	LDP		X29, X30, [SP], #0x10
+	LDP		X18, X19, [SP], #0x10
+	LDP		X16, X17, [SP], #0x10
+	LDP		X14, X15, [SP], #0x10
+	LDP		X12, X13, [SP], #0x10
+	LDP		X10, X11, [SP], #0x10
+	LDP		X8, X9, [SP], #0x10
+	LDP		X6, X7, [SP], #0x10
+	LDP		X4, X5, [SP], #0x10
+	LDP		X2, X3, [SP], #0x10
+	LDP		X0, X1, [SP], #0x10
+
+	ERET
+
+
+
+
+.align 8
+pxCurrentTCBConst: .dword pxCurrentTCB
+ullCriticalNestingConst: .dword ullCriticalNesting
+ullPortTaskHasFPUContextConst: .dword ullPortTaskHasFPUContext
+
+ullICCPMRConst: .dword ullICCPMR
+ullMaxAPIPriorityMaskConst: .dword ullMaxAPIPriorityMask
+vApplicationIRQHandlerConst: .word FreeRTOS_ApplicationIRQHandler
+ullPortInterruptNestingConst: .dword ullPortInterruptNesting
+ullPortYieldRequiredConst: .dword ullPortYieldRequired
+ullICCIARConst:	.dword ullICCIAR
+ullICCEOIRConst: .dword ullICCEOIR
+
+
+
+.end

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA53/portZynqUltrascale.c

@@ -0,0 +1,260 @@
+/*
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+    ***************************************************************************
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+    ***************************************************************************
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+    link: http://www.freertos.org/a00114.html
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that is more than just the market leader, it     *
+     *    is the industry's de facto standard.                               *
+     *                                                                       *
+     *    Help yourself get started quickly while simultaneously helping     *
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+     *    tutorial book, reference manual, or both:                          *
+     *    http://www.FreeRTOS.org/Documentation                              *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+    the FAQ page "My application does not run, what could be wrong?".  Have you
+    defined configASSERT()?
+
+    http://www.FreeRTOS.org/support - In return for receiving this top quality
+    embedded software for free we request you assist our global community by
+    participating in the support forum.
+
+    http://www.FreeRTOS.org/training - Investing in training allows your team to
+    be as productive as possible as early as possible.  Now you can receive
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+    Ltd, and the world's leading authority on the world's leading RTOS.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and commercial middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Xilinx includes. */
+#include "xttcps.h"
+#include "xscugic.h"
+
+/* Timer used to generate the tick interrupt. */
+static XTtcPs xTimerInstance;
+XScuGic xInterruptController;
+/*-----------------------------------------------------------*/
+
+void FreeRTOS_SetupTickInterrupt( void )
+{
+BaseType_t xStatus;
+XTtcPs_Config *pxTimerConfiguration;
+uint16_t usInterval;
+uint8_t ucPrescale;
+const uint8_t ucLevelSensitive = 1;
+XScuGic_Config *pxInterruptControllerConfig;
+
+	/* Initialize the interrupt controller driver. */
+	pxInterruptControllerConfig = XScuGic_LookupConfig( configINTERRUPT_CONTROLLER_DEVICE_ID );
+	XScuGic_CfgInitialize( &xInterruptController,
+						   pxInterruptControllerConfig,
+						   pxInterruptControllerConfig->CpuBaseAddress );
+
+	/* Connect the interrupt controller interrupt handler to the hardware
+	interrupt handling logic in the ARM processor. */
+	Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_IRQ_INT,
+								( Xil_ExceptionHandler ) XScuGic_InterruptHandler,
+								&xInterruptController);
+
+	/* Enable interrupts in the ARM. */
+	Xil_ExceptionEnable();
+
+	pxTimerConfiguration = XTtcPs_LookupConfig( configTIMER_ID );
+
+	/* Initialise the device. */
+	xStatus = XTtcPs_CfgInitialize( &xTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );
+
+	if( xStatus != XST_SUCCESS )
+	{
+		/* Not sure how to do this before XTtcPs_CfgInitialize is called as
+		*xRTOSTickTimerInstance is set within XTtcPs_CfgInitialize(). */
+		XTtcPs_Stop( &xTimerInstance );
+		xStatus = XTtcPs_CfgInitialize( &xTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );
+		configASSERT( xStatus == XST_SUCCESS );
+	}
+
+	/* Set the options. */
+	XTtcPs_SetOptions( &xTimerInstance, ( XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE ) );
+
+	/* Derive values from the tick rate. */
+	XTtcPs_CalcIntervalFromFreq( &xTimerInstance, configTICK_RATE_HZ, &( usInterval ), &( ucPrescale ) );
+
+	/* Set the interval and prescale. */
+	XTtcPs_SetInterval( &xTimerInstance, usInterval );
+	XTtcPs_SetPrescaler( &xTimerInstance, ucPrescale );
+
+	/* The priority must be the lowest possible. */
+	XScuGic_SetPriorityTriggerType( &xInterruptController, configTIMER_INTERRUPT_ID, portLOWEST_USABLE_INTERRUPT_PRIORITY << portPRIORITY_SHIFT, ucLevelSensitive );
+
+	/* Connect to the interrupt controller. */
+	XScuGic_Connect( &xInterruptController,
+					 configTIMER_INTERRUPT_ID,
+					( Xil_InterruptHandler ) FreeRTOS_Tick_Handler,
+					( void * ) &xTimerInstance );
+
+	/* Enable the interrupt in the GIC. */
+	XScuGic_Enable( &xInterruptController, configTIMER_INTERRUPT_ID );
+
+	/* Enable the interrupts in the timer. */
+	XTtcPs_EnableInterrupts( &xTimerInstance, XTTCPS_IXR_INTERVAL_MASK );
+
+	/* Start the timer. */
+	XTtcPs_Start( &xTimerInstance );
+}
+/*-----------------------------------------------------------*/
+
+void FreeRTOS_ClearTickInterrupt( void )
+{
+volatile uint32_t ulInterruptStatus;
+
+	/* Read the interrupt status, then write it back to clear the interrupt. */
+	ulInterruptStatus = XTtcPs_GetInterruptStatus( &xTimerInstance );
+	XTtcPs_ClearInterruptStatus( &xTimerInstance, ulInterruptStatus );
+	__asm volatile( "DSB SY" );
+	__asm volatile( "ISB SY" );
+}
+/*-----------------------------------------------------------*/
+
+void FreeRTOS_ApplicationIRQHandler( uint32_t ulICCIAR )
+{
+extern const XScuGic_Config XScuGic_ConfigTable[];
+static const XScuGic_VectorTableEntry *pxVectorTable = XScuGic_ConfigTable[ XPAR_SCUGIC_SINGLE_DEVICE_ID ].HandlerTable;
+uint32_t ulInterruptID;
+const XScuGic_VectorTableEntry *pxVectorEntry;
+
+	/* Interrupts cannot be re-enabled until the source of the interrupt is
+	cleared. The ID of the interrupt is obtained by bitwise ANDing the ICCIAR
+	value with 0x3FF. */
+	ulInterruptID = ulICCIAR & 0x3FFUL;
+	if( ulInterruptID < XSCUGIC_MAX_NUM_INTR_INPUTS )
+	{
+		/* Call the function installed in the array of installed handler
+		functions. */
+		pxVectorEntry = &( pxVectorTable[ ulInterruptID ] );
+		configASSERT( pxVectorEntry );
+		pxVectorEntry->Handler( pxVectorEntry->CallBackRef );
+	}
+}
+/*-----------------------------------------------------------*/
+
+/* This version of vApplicationAssert() is declared as a weak symbol to allow it
+to be overridden by a version implemented within the application that is using
+this BSP. */
+void vApplicationAssert( const char *pcFileName, uint32_t ulLine )
+{
+volatile uint32_t ul = 0;
+volatile const char *pcLocalFileName = pcFileName; /* To prevent pcFileName being optimized away. */
+volatile uint32_t ulLocalLine = ulLine; /* To prevent ulLine being optimized away. */
+
+	/* Prevent compile warnings about the following two variables being set but
+	not referenced.  They are intended for viewing in the debugger. */
+	( void ) pcLocalFileName;
+	( void ) ulLocalLine;
+
+	xil_printf( "Assert failed in file %s, line %lu\r\n", pcLocalFileName, ulLocalLine );
+
+	/* If this function is entered then a call to configASSERT() failed in the
+	FreeRTOS code because of a fatal error.  The pcFileName and ulLine
+	parameters hold the file name and line number in that file of the assert
+	that failed.  Additionally, if using the debugger, the function call stack
+	can be viewed to find which line failed its configASSERT() test.  Finally,
+	the debugger can be used to set ul to a non-zero value, then step out of
+	this function to find where the assert function was entered. */
+	taskENTER_CRITICAL();
+	{
+		while( ul == 0 )
+		{
+			__asm volatile( "NOP" );
+		}
+	}
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+/* This default tick hook does nothing and is declared as a weak symbol to allow
+the application writer to override this default by providing their own
+implementation in the application code. */
+void vApplicationTickHook( void )
+{
+}
+/*-----------------------------------------------------------*/
+
+/* This default idle hook does nothing and is declared as a weak symbol to allow
+the application writer to override this default by providing their own
+implementation in the application code. */
+void vApplicationIdleHook( void )
+{
+}
+/*-----------------------------------------------------------*/
+
+/* This default malloc failed hook does nothing and is declared as a weak symbol
+to allow the application writer to override this default by providing their own
+implementation in the application code. */
+void vApplicationMallocFailedHook( void )
+{
+	xil_printf( "vApplicationMallocFailedHook() called\n" );
+}
+/*-----------------------------------------------------------*/
+
+/* This default stack overflow hook will stop the application for executing.  It
+is declared as a weak symbol to allow the application writer to override this
+default by providing their own implementation in the application code. */
+void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
+{
+/* Attempt to prevent the handle and name of the task that overflowed its stack
+from being optimised away because they are not used. */
+volatile TaskHandle_t xOverflowingTaskHandle = xTask;
+volatile char *pcOverflowingTaskName = pcTaskName;
+
+	( void ) xOverflowingTaskHandle;
+	( void ) pcOverflowingTaskName;
+
+	xil_printf( "HALT: Task %s overflowed its stack.", pcOverflowingTaskName );
+	portDISABLE_INTERRUPTS();
+	for( ;; );
+}

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA53/port_asm_vectors.S

@@ -0,0 +1,307 @@
+/******************************************************************************
+*
+* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+/*****************************************************************************/
+/**
+* @file asm_vectors.s
+*
+* This file contains the initial vector table for the Cortex A53 processor
+* Currently NEON registers are not saved on stack if interrupt is taken.
+* It will be implemented.
+*
+* <pre>
+* MODIFICATION HISTORY:
+*
+* Ver   Who     Date     Changes
+* ----- ------- -------- ---------------------------------------------------
+* 5.00	pkp	5/21/14 Initial version
+* </pre>
+*
+* @note
+*
+* None.
+*
+******************************************************************************/
+
+
+
+.org 0
+.text
+
+.globl _boot
+.globl _vector_table
+.globl _freertos_vector_table
+
+.globl FIQInterrupt
+.globl IRQInterrupt
+.globl SErrorInterrupt
+.globl SynchronousInterrupt
+
+
+.org 0
+
+.section .vectors, "a"
+
+_vector_table:
+
+.set	VBAR, _vector_table
+
+.org VBAR
+	b	_boot
+
+.org (VBAR + 0x80)
+	b	.
+
+.org (VBAR + 0x100)
+	b	.
+
+.org (VBAR + 0x180)
+	b	.
+
+
+.org (VBAR + 0x200)
+	b	.
+
+.org (VBAR + 0x280)
+	b	.
+
+.org (VBAR + 0x300)
+	b	.
+
+.org (VBAR + 0x380)
+	b	.
+
+
+
+.org (VBAR + 0x400)
+	b	.
+
+.org (VBAR + 0x480)
+	b	.
+
+.org (VBAR + 0x500)
+	b	.
+
+.org (VBAR + 0x580)
+	b	.
+
+.org (VBAR + 0x600)
+	b	.
+
+.org (VBAR + 0x680)
+	b	.
+
+.org (VBAR + 0x700)
+	b	.
+
+.org (VBAR + 0x780)
+	b	.
+
+
+
+/******************************************************************************
+ * Vector table to use when FreeRTOS is running.
+ *****************************************************************************/
+.set	FREERTOS_VBAR, (VBAR+0x1000)
+
+.org(FREERTOS_VBAR)
+_freertos_vector_table:
+	b	FreeRTOS_SWI_Handler
+
+.org (FREERTOS_VBAR + 0x80)
+	b	FreeRTOS_IRQ_Handler
+
+.org (FREERTOS_VBAR + 0x100)
+	b	.
+
+.org (FREERTOS_VBAR + 0x180)
+	b	.
+
+.org (FREERTOS_VBAR + 0x200)
+	b	FreeRTOS_SWI_Handler
+
+.org (FREERTOS_VBAR + 0x280)
+	b	FreeRTOS_IRQ_Handler
+
+.org (FREERTOS_VBAR + 0x300)
+	b	.
+
+.org (FREERTOS_VBAR + 0x380)
+	b	.
+
+.org (FREERTOS_VBAR + 0x400)
+	b	.
+
+.org (FREERTOS_VBAR + 0x480)
+	b	.
+
+.org (FREERTOS_VBAR + 0x500)
+	b	.
+
+.org (FREERTOS_VBAR + 0x580)
+	b	.
+
+.org (FREERTOS_VBAR + 0x600)
+	b	.
+
+.org (FREERTOS_VBAR + 0x680)
+	b	.
+
+.org (FREERTOS_VBAR + 0x700)
+	b	.
+
+.org (FREERTOS_VBAR + 0x780)
+	b	.
+
+.org (FREERTOS_VBAR + 0x800)
+
+
+
+
+SynchronousInterruptHandler:
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+        bl      SynchronousInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+        ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+IRQInterruptHandler:
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+	bl      IRQInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+	ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+FIQInterruptHandler:
+
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+        bl      FIQInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+        ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+SErrorInterruptHandler:
+
+	stp	X0,X1, [sp,#-0x10]!
+	stp	X2,X3, [sp,#-0x10]!
+	stp	X4,X5, [sp,#-0x10]!
+	stp	X6,X7, [sp,#-0x10]!
+	stp	X8,X9, [sp,#-0x10]!
+	stp	X10,X11, [sp,#-0x10]!
+	stp	X12,X13, [sp,#-0x10]!
+	stp	X14,X15, [sp,#-0x10]!
+	stp	X16,X17, [sp,#-0x10]!
+	stp     X18,X19, [sp,#-0x10]!
+	stp     X29,X30, [sp,#-0x10]!
+
+        bl      SErrorInterrupt
+
+	ldp     X29,X30, [sp], #0x10
+        ldp     X18,X19, [sp], #0x10
+	ldp	X16,X17, [sp], #0x10
+	ldp	X14,X15, [sp], #0x10
+	ldp	X12,X13, [sp], #0x10
+	ldp	X10,X11, [sp], #0x10
+	ldp	X8,X9, [sp], #0x10
+	ldp	X6,X7, [sp], #0x10
+	ldp	X4,X5, [sp], #0x10
+	ldp	X2,X3, [sp], #0x10
+	ldp	X0,X1, [sp], #0x10
+
+	eret
+
+.end

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA53/portmacro.h

@@ -0,0 +1,247 @@
+/*
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
+    All rights reserved
+
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+    This file is part of the FreeRTOS distribution.
+
+    FreeRTOS is free software; you can redistribute it and/or modify it under
+    the terms of the GNU General Public License (version 2) as published by the
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+    ***************************************************************************
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<
+    >>!   obliged to provide the source code for proprietary components     !<<
+    >>!   outside of the FreeRTOS kernel.                                   !<<
+    ***************************************************************************
+
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
+    link: http://www.freertos.org/a00114.html
+
+    ***************************************************************************
+     *                                                                       *
+     *    FreeRTOS provides completely free yet professionally developed,    *
+     *    robust, strictly quality controlled, supported, and cross          *
+     *    platform software that is more than just the market leader, it     *
+     *    is the industry's de facto standard.                               *
+     *                                                                       *
+     *    Help yourself get started quickly while simultaneously helping     *
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
+     *    tutorial book, reference manual, or both:                          *
+     *    http://www.FreeRTOS.org/Documentation                              *
+     *                                                                       *
+    ***************************************************************************
+
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
+    the FAQ page "My application does not run, what could be wrong?".  Have you
+    defined configASSERT()?
+
+    http://www.FreeRTOS.org/support - In return for receiving this top quality
+    embedded software for free we request you assist our global community by
+    participating in the support forum.
+
+    http://www.FreeRTOS.org/training - Investing in training allows your team to
+    be as productive as possible as early as possible.  Now you can receive
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+    Ltd, and the world's leading authority on the world's leading RTOS.
+
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
+    licenses offer ticketed support, indemnification and commercial middleware.
+
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+    engineered and independently SIL3 certified version for use in safety and
+    mission critical applications that require provable dependability.
+
+    1 tab == 4 spaces!
+*/
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+#ifdef __cplusplus
+	extern "C" {
+#endif
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+#define portCHAR		char
+#define portFLOAT		float
+#define portDOUBLE		double
+#define portLONG		long
+#define portSHORT		short
+#define portSTACK_TYPE	size_t
+#define portBASE_TYPE	long
+
+typedef portSTACK_TYPE StackType_t;
+typedef portBASE_TYPE BaseType_t;
+typedef uint64_t UBaseType_t;
+
+typedef uint64_t TickType_t;
+#define portMAX_DELAY ( ( TickType_t ) 0xffffffffffffffff )
+
+/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
+not need to be guarded with a critical section. */
+#define portTICK_TYPE_IS_ATOMIC 1
+
+/*-----------------------------------------------------------*/
+
+/* Hardware specifics. */
+#define portSTACK_GROWTH			( -1 )
+#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portBYTE_ALIGNMENT			16
+#define portPOINTER_SIZE_TYPE 		uint64_t
+
+/*-----------------------------------------------------------*/
+
+/* Task utilities. */
+
+/* Called at the end of an ISR that can cause a context switch. */
+#define portEND_SWITCHING_ISR( xSwitchRequired )\
+{												\
+extern uint64_t ullPortYieldRequired;			\
+												\
+	if( xSwitchRequired != pdFALSE )			\
+	{											\
+		ullPortYieldRequired = pdTRUE;			\
+	}											\
+}
+
+#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
+#define portYIELD() __asm volatile ( "SMC 0" )
+
+/*-----------------------------------------------------------
+ * Critical section control
+ *----------------------------------------------------------*/
+
+extern void vPortEnterCritical( void );
+extern void vPortExitCritical( void );
+extern UBaseType_t uxPortSetInterruptMask( void );
+extern void vPortClearInterruptMask( UBaseType_t uxNewMaskValue );
+extern void vPortInstallFreeRTOSVectorTable( void );
+
+#define portDISABLE_INTERRUPTS()									\
+	__asm volatile ( "MSR DAIFSET, #2" );							\
+	__asm volatile ( "DSB SY" );									\
+	__asm volatile ( "ISB SY" );
+
+#define portENABLE_INTERRUPTS()										\
+	__asm volatile ( "MSR DAIFCLR, #2" );							\
+	__asm volatile ( "DSB SY" );									\
+	__asm volatile ( "ISB SY" );
+
+
+/* These macros do not globally disable/enable interrupts.  They do mask off
+interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
+#define portENTER_CRITICAL()		vPortEnterCritical();
+#define portEXIT_CRITICAL()			vPortExitCritical();
+#define portSET_INTERRUPT_MASK_FROM_ISR()		uxPortSetInterruptMask()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	vPortClearInterruptMask(x)
+
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site.  These are
+not required for this port but included in case common demo code that uses these
+macros is used. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters )	void vFunction( void *pvParameters )
+
+/* Prototype of the FreeRTOS tick handler.  This must be installed as the
+handler for whichever peripheral is used to generate the RTOS tick. */
+void FreeRTOS_Tick_Handler( void );
+
+/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
+before any floating point instructions are executed. */
+void vPortTaskUsesFPU( void );
+#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
+
+#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
+#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
+
+/* Architecture specific optimisations. */
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+#endif
+
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+
+	/* Store/clear the ready priorities in a bit map. */
+	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+
+	/*-----------------------------------------------------------*/
+
+	#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) )
+
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+#ifdef configASSERT
+	void vPortValidateInterruptPriority( void );
+	#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() 	vPortValidateInterruptPriority()
+#endif /* configASSERT */
+
+#define portNOP() __asm volatile( "NOP" )
+#define portINLINE __inline
+
+#ifdef __cplusplus
+	} /* extern C */
+#endif
+
+
+/* The number of bits to shift for an interrupt priority is dependent on the
+number of bits implemented by the interrupt controller. */
+#if configUNIQUE_INTERRUPT_PRIORITIES == 16
+	#define portPRIORITY_SHIFT 4
+	#define portMAX_BINARY_POINT_VALUE	3
+#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
+	#define portPRIORITY_SHIFT 3
+	#define portMAX_BINARY_POINT_VALUE	2
+#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
+	#define portPRIORITY_SHIFT 2
+	#define portMAX_BINARY_POINT_VALUE	1
+#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
+	#define portPRIORITY_SHIFT 1
+	#define portMAX_BINARY_POINT_VALUE	0
+#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
+	#define portPRIORITY_SHIFT 0
+	#define portMAX_BINARY_POINT_VALUE	0
+#else
+	#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting.  configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
+#endif
+
+/* Interrupt controller access addresses. */
+#define portICCPMR_PRIORITY_MASK_OFFSET  						( 0x04 )
+#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET 				( 0x0C )
+#define portICCEOIR_END_OF_INTERRUPT_OFFSET 					( 0x10 )
+#define portICCBPR_BINARY_POINT_OFFSET							( 0x08 )
+#define portICCRPR_RUNNING_PRIORITY_OFFSET						( 0x14 )
+
+#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS 		( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
+#define portICCPMR_PRIORITY_MASK_REGISTER 					( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
+#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS 	( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
+#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS 		( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
+#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS 			( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
+#define portICCBPR_BINARY_POINT_REGISTER 					( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
+#define portICCRPR_RUNNING_PRIORITY_REGISTER 				( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
+
+#endif /* PORTMACRO_H */

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA9/port.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA9/portASM.S

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
 

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA9/portZynq7000.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -95,12 +95,11 @@ void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName ) __att
 
 /* Timer used to generate the tick interrupt. */
 static XScuTimer xTimer;
-
+XScuGic xInterruptController; 	/* Interrupt controller instance */
 /*-----------------------------------------------------------*/
 
 void FreeRTOS_SetupTickInterrupt( void )
 {
-static XScuGic xInterruptController; 	/* Interrupt controller instance */
 BaseType_t xStatus;
 extern void FreeRTOS_Tick_Handler( void );
 XScuTimer_Config *pxTimerConfig;

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CA9/portmacro.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CR5/port.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CR5/portASM.S

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CR5/portZynqUltrascale.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CR5/port_asm_vectors.S

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/ARM_CR5/portmacro.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/MicroBlazeV8/port.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/MicroBlazeV8/port_exceptions.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/MicroBlazeV8/portasm.S

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/MicroBlazeV8/portmacro.h

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/GCC/MicroBlazeV8/portmicroblaze.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

ThirdParty/bsp/freertos823_xilinx/src/Source/portable/MemMang/heap_4.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -237,7 +237,7 @@ void *pvReturn = NULL;
 						pxBlock->xBlockSize = xWantedSize;
 
 						/* Insert the new block into the list of free blocks. */
-						prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
+						prvInsertBlockIntoFreeList( pxNewBlockLink );
 					}
 					else
 					{
@@ -293,7 +293,7 @@ void *pvReturn = NULL;
 	}
 	#endif
 
-	configASSERT( ( ( ( uint32_t ) pvReturn ) & portBYTE_ALIGNMENT_MASK ) == 0 );
+	configASSERT( ( ( ( size_t ) pvReturn ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 	return pvReturn;
 }
 /*-----------------------------------------------------------*/

ThirdParty/bsp/freertos823_xilinx/src/Source/queue.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -189,7 +189,7 @@ typedef xQUEUE Queue_t;
 	/* The queue registry is simply an array of QueueRegistryItem_t structures.
 	The pcQueueName member of a structure being NULL is indicative of the
 	array position being vacant. */
-	QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
+	PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
 
 #endif /* configQUEUE_REGISTRY_SIZE */
 
@@ -315,7 +315,6 @@ QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseT
 Queue_t *pxNewQueue;
 size_t xQueueSizeInBytes;
 QueueHandle_t xReturn = NULL;
-int8_t *pcAllocatedBuffer;
 
 	/* Remove compiler warnings about unused parameters should
 	configUSE_TRACE_FACILITY not be set to 1. */
@@ -336,12 +335,10 @@ int8_t *pcAllocatedBuffer;
 	}
 
 	/* Allocate the new queue structure and storage area. */
-	pcAllocatedBuffer = ( int8_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );
+	pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );
 
-	if( pcAllocatedBuffer != NULL )
+	if( pxNewQueue != NULL )
 	{
-		pxNewQueue = ( Queue_t * ) pcAllocatedBuffer; /*lint !e826 MISRA The buffer cannot be too small because it was dimensioned by sizeof( Queue_t ) + xQueueSizeInBytes. */
-
 		if( uxItemSize == ( UBaseType_t ) 0 )
 		{
 			/* No RAM was allocated for the queue storage area, but PC head
@@ -353,8 +350,8 @@ int8_t *pcAllocatedBuffer;
 		else
 		{
 			/* Jump past the queue structure to find the location of the queue
-			storage area - adding the padding bytes to get a better alignment. */
-			pxNewQueue->pcHead = pcAllocatedBuffer + sizeof( Queue_t );
+			storage area. */
+			pxNewQueue->pcHead = ( ( int8_t * ) pxNewQueue ) + sizeof( Queue_t );
 		}
 
 		/* Initialise the queue members as described above where the queue type
@@ -447,7 +444,6 @@ int8_t *pcAllocatedBuffer;
 			traceCREATE_MUTEX_FAILED();
 		}
 
-		configASSERT( pxNewQueue );
 		return pxNewQueue;
 	}
 
@@ -1222,9 +1218,9 @@ Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 	if the item size is not 0. */
 	configASSERT( pxQueue->uxItemSize == 0 );
 
-	/* Normally a mutex would not be given from an interrupt, and doing so is
-	definitely wrong if there is a mutex holder as priority inheritance makes no
-	sense for an interrupts, only tasks. */
+	/* Normally a mutex would not be given from an interrupt, especially if
+	there is a mutex holder, as priority inheritance makes no sense for an
+	interrupts, only tasks. */
 	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->pxMutexHolder != NULL ) ) );
 
 	/* RTOS ports that support interrupt nesting have the concept of a maximum
@@ -2403,7 +2399,7 @@ BaseType_t xReturn;
 
 #if ( configUSE_TIMERS == 1 )
 
-	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait )
+	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
 	{
 	Queue_t * const pxQueue = ( Queue_t * ) xQueue;
 
@@ -2425,7 +2421,7 @@ BaseType_t xReturn;
 		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 		{
 			/* There is nothing in the queue, block for the specified period. */
-			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 		}
 		else
 		{

ThirdParty/bsp/freertos823_xilinx/src/Source/tasks.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -99,8 +99,8 @@ functions but without including stdio.h here. */
 #endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */
 
 /* Sanity check the configuration. */
-#if configUSE_TICKLESS_IDLE != 0
-	#if INCLUDE_vTaskSuspend != 1
+#if( configUSE_TICKLESS_IDLE != 0 )
+	#if( INCLUDE_vTaskSuspend != 1 )
 		#error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0
 	#endif /* INCLUDE_vTaskSuspend */
 #endif /* configUSE_TICKLESS_IDLE */
@@ -247,7 +247,7 @@ PRIVILEGED_DATA static volatile UBaseType_t uxPendedTicks 			= ( UBaseType_t ) 0
 PRIVILEGED_DATA static volatile BaseType_t xYieldPending 			= pdFALSE;
 PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows 			= ( BaseType_t ) 0;
 PRIVILEGED_DATA static UBaseType_t uxTaskNumber 					= ( UBaseType_t ) 0U;
-PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime		= ( TickType_t ) 0U; /* Initialised to portMAX_DELAY; before the scheduler starts. */
+PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime		= ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
 
 /* Context switches are held pending while the scheduler is suspended.  Also,
 interrupts must not manipulate the xGenericListItem of a TCB, or any of the
@@ -1062,8 +1062,8 @@ StackType_t *pxTopOfStack;
 
 		taskENTER_CRITICAL();
 		{
-			/* If null is passed in here then we are changing the
-			priority of the calling function. */
+			/* If null is passed in here then it is the priority of the that
+			called uxTaskPriorityGet() that is being queried. */
 			pxTCB = prvGetTCBFromHandle( xTask );
 			uxReturn = pxTCB->uxPriority;
 		}
@@ -2241,8 +2241,7 @@ void vTaskSwitchContext( void )
 		#endif /* configGENERATE_RUN_TIME_STATS */
 
 		/* Check for stack overflow, if configured. */
-		taskFIRST_CHECK_FOR_STACK_OVERFLOW();
-		taskSECOND_CHECK_FOR_STACK_OVERFLOW();
+		taskCHECK_FOR_STACK_OVERFLOW();
 
 		/* Select a new task to run using either the generic C or port
 		optimised asm code. */
@@ -2387,7 +2386,7 @@ TickType_t xTimeToWake;
 
 #if configUSE_TIMERS == 1
 
-	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, const TickType_t xTicksToWait )
+	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, const TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
 	{
 	TickType_t xTimeToWake;
 
@@ -2420,12 +2419,44 @@ TickType_t xTimeToWake;
 			mtCOVERAGE_TEST_MARKER();
 		}
 
-		/* Calculate the time at which the task should be woken if the event does
-		not occur.  This may overflow but this doesn't matter. */
-		xTimeToWake = xTickCount + xTicksToWait;
+		/* If vTaskSuspend() is available then the suspended task list is also
+		available and a task that is blocking indefinitely can enter the
+		suspended state (it is not really suspended as it will re-enter the
+		Ready state when the event it is waiting indefinitely for occurs).
+		Blocking indefinitely is useful when using tickless idle mode as when
+		all tasks are blocked indefinitely all timers can be turned off. */
+		#if( INCLUDE_vTaskSuspend == 1 )
+		{
+			if( xWaitIndefinitely == pdTRUE )
+			{
+				/* Add the task to the suspended task list instead of a delayed
+				task list to ensure the task is not woken by a timing event.  It
+				will block indefinitely. */
+				vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xGenericListItem ) );
+			}
+			else
+			{
+				/* Calculate the time at which the task should be woken if the
+				event does not occur.  This may overflow but this doesn't
+				matter. */
+				xTimeToWake = xTickCount + xTicksToWait;
+				traceTASK_DELAY_UNTIL();
+				prvAddCurrentTaskToDelayedList( xTimeToWake );
+			}
+		}
+		#else
+		{
+			/* Calculate the time at which the task should be woken if the event
+			does not occur.  This may overflow but this doesn't matter. */
+			xTimeToWake = xTickCount + xTicksToWait;
+			traceTASK_DELAY_UNTIL();
+			prvAddCurrentTaskToDelayedList( xTimeToWake );
 
-		traceTASK_DELAY_UNTIL();
-		prvAddCurrentTaskToDelayedList( xTimeToWake );
+			/* Remove compiler warnings when INCLUDE_vTaskSuspend() is not
+			defined. */
+			( void ) xWaitIndefinitely;
+		}
+		#endif
 	}
 
 #endif /* configUSE_TIMERS */
@@ -2481,12 +2512,12 @@ BaseType_t xReturn;
 		xReturn = pdFALSE;
 	}
 
-	#if( configUSE_TICKLESS_IDLE == 1 )
+	#if( configUSE_TICKLESS_IDLE != 0 )
 	{
 		/* If a task is blocked on a kernel object then xNextTaskUnblockTime
 		might be set to the blocked task's time out time.  If the task is
 		unblocked for a reason other than a timeout xNextTaskUnblockTime is
-		normally left unchanged, because it is automatically get reset to a new
+		normally left unchanged, because it is automatically reset to a new
 		value when the tick count equals xNextTaskUnblockTime.  However if
 		tickless idling is used it might be more important to enter sleep mode
 		at the earliest possible time - so reset xNextTaskUnblockTime here to
@@ -2759,10 +2790,12 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters )
 }
 /*-----------------------------------------------------------*/
 
-#if configUSE_TICKLESS_IDLE != 0
+#if( configUSE_TICKLESS_IDLE != 0 )
 
 	eSleepModeStatus eTaskConfirmSleepModeStatus( void )
 	{
+	/* The idle task exists in addition to the application tasks. */
+	const UBaseType_t uxNonApplicationTasks = 1;
 	eSleepModeStatus eReturn = eStandardSleep;
 
 		if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
@@ -2777,29 +2810,23 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters )
 		}
 		else
 		{
-			#if configUSE_TIMERS == 0
+			/* If all the tasks are in the suspended list (which might mean they
+			have an infinite block time rather than actually being suspended)
+			then it is safe to turn all clocks off and just wait for external
+			interrupts. */
+			if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
 			{
-				/* The idle task exists in addition to the application tasks. */
-				const UBaseType_t uxNonApplicationTasks = 1;
-
-				/* If timers are not being used and all the tasks are in the
-				suspended list (which might mean they have an infinite block
-				time rather than actually being suspended) then it is safe to
-				turn all clocks off and just wait for external interrupts. */
-				if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
-				{
-					eReturn = eNoTasksWaitingTimeout;
-				}
-				else
-				{
-					mtCOVERAGE_TEST_MARKER();
-				}
+				eReturn = eNoTasksWaitingTimeout;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
 			}
-			#endif /* configUSE_TIMERS */
 		}
 
 		return eReturn;
 	}
+
 #endif /* configUSE_TICKLESS_IDLE */
 /*-----------------------------------------------------------*/
 
@@ -2958,7 +2985,8 @@ UBaseType_t x;
 	{
 	TCB_t *pxTCB;
 
-		/* If null is passed in here then we are deleting ourselves. */
+		/* If null is passed in here then we are modifying the MPU settings of
+		the calling task. */
 		pxTCB = prvGetTCBFromHandle( xTaskToModify );
 
         vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
@@ -3552,7 +3580,6 @@ TCB_t *pxTCB;
 			{
 				portASSERT_IF_IN_ISR();
 			}
-
 		}
 		else
 		{
@@ -3600,14 +3627,14 @@ TCB_t *pxTCB;
 
 	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName )
 	{
-	BaseType_t x;
+	size_t x;
 
 		/* Start by copying the entire string. */
 		strcpy( pcBuffer, pcTaskName );
 
 		/* Pad the end of the string with spaces to ensure columns line up when
 		printed out. */
-		for( x = strlen( pcBuffer ); x < ( configMAX_TASK_NAME_LEN - 1 ); x++ )
+		for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
 		{
 			pcBuffer[ x ] = ' ';
 		}
@@ -3931,6 +3958,8 @@ TickType_t uxReturn;
 					}
 					#endif /* INCLUDE_vTaskSuspend */
 
+					traceTASK_NOTIFY_TAKE_BLOCK();
+
 					/* All ports are written to allow a yield in a critical
 					section (some will yield immediately, others wait until the
 					critical section exits) - but it is not something that
@@ -3951,6 +3980,7 @@ TickType_t uxReturn;
 
 		taskENTER_CRITICAL();
 		{
+			traceTASK_NOTIFY_TAKE();
 			ulReturn = pxCurrentTCB->ulNotifiedValue;
 
 			if( ulReturn != 0UL )
@@ -4046,6 +4076,8 @@ TickType_t uxReturn;
 					}
 					#endif /* INCLUDE_vTaskSuspend */
 
+					traceTASK_NOTIFY_WAIT_BLOCK();
+
 					/* All ports are written to allow a yield in a critical
 					section (some will yield immediately, others wait until the
 					critical section exits) - but it is not something that
@@ -4066,6 +4098,8 @@ TickType_t uxReturn;
 
 		taskENTER_CRITICAL();
 		{
+			traceTASK_NOTIFY_WAIT();
+
 			if( pulNotificationValue != NULL )
 			{
 				/* Output the current notification value, which may or may not
@@ -4154,6 +4188,7 @@ TickType_t uxReturn;
 					break;
 			}
 
+			traceTASK_NOTIFY();
 
 			/* If the task is in the blocked state specifically to wait for a
 			notification then unblock it now. */
@@ -4165,6 +4200,22 @@ TickType_t uxReturn;
 				/* The task should not have been on an event list. */
 				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 
+				#if( configUSE_TICKLESS_IDLE != 0 )
+				{
+					/* If a task is blocked waiting for a notification then
+					xNextTaskUnblockTime might be set to the blocked task's time
+					out time.  If the task is unblocked for a reason other than
+					a timeout xNextTaskUnblockTime is normally left unchanged,
+					because it will automatically get reset to a new value when
+					the tick count equals xNextTaskUnblockTime.  However if
+					tickless idling is used it might be more important to enter
+					sleep mode at the earliest possible time - so reset
+					xNextTaskUnblockTime here to ensure it is updated at the
+					earliest possible time. */
+					prvResetNextTaskUnblockTime();
+				}
+				#endif
+
 				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 				{
 					/* The notified task has a priority above the currently
@@ -4191,7 +4242,7 @@ TickType_t uxReturn;
 
 #if( configUSE_TASK_NOTIFICATIONS == 1 )
 
-	BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken )
+	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
 	{
 	TCB_t * pxTCB;
 	eNotifyValue eOriginalNotifyState;
@@ -4222,8 +4273,12 @@ TickType_t uxReturn;
 
 		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 		{
-			eOriginalNotifyState = pxTCB->eNotifyState;
+			if( pulPreviousNotificationValue != NULL )
+			{
+				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
+			}
 
+			eOriginalNotifyState = pxTCB->eNotifyState;
 			pxTCB->eNotifyState = eNotified;
 
 			switch( eAction )
@@ -4258,6 +4313,7 @@ TickType_t uxReturn;
 					break;
 			}
 
+			traceTASK_NOTIFY_FROM_ISR();
 
 			/* If the task is in the blocked state specifically to wait for a
 			notification then unblock it now. */
@@ -4340,6 +4396,8 @@ TickType_t uxReturn;
 			semaphore. */
 			( pxTCB->ulNotifiedValue )++;
 
+			traceTASK_NOTIFY_GIVE_FROM_ISR();
+
 			/* If the task is in the blocked state specifically to wait for a
 			notification then unblock it now. */
 			if( eOriginalNotifyState == eWaitingNotification )
@@ -4381,6 +4439,37 @@ TickType_t uxReturn;
 
 /*-----------------------------------------------------------*/
 
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB;
+	BaseType_t xReturn;
+
+		pxTCB = ( TCB_t * ) xTask;
+
+		/* If null is passed in here then it is the calling task that is having
+		its notification state cleared. */
+		pxTCB = prvGetTCBFromHandle( pxTCB );
+
+		taskENTER_CRITICAL();
+		{
+			if( pxTCB->eNotifyState == eNotified )
+			{
+				pxTCB->eNotifyState = eNotWaitingNotification;
+				xReturn = pdPASS;
+			}
+			else
+			{
+				xReturn = pdFAIL;
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
 
 #ifdef FREERTOS_MODULE_TEST
 	#include "tasks_test_access_functions.h"

ThirdParty/bsp/freertos823_xilinx/src/Source/timers.c

@@ -1,5 +1,5 @@
 /*
-    FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
     All rights reserved
 
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -8,7 +8,7 @@
 
     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
 
     ***************************************************************************
     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
@@ -195,7 +195,7 @@ static void prvTimerTask( void *pvParameters ) PRIVILEGED_FUNCTION;
  * Called by the timer service task to interpret and process a command it
  * received on the timer queue.
  */
-static void	prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
+static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
@@ -233,7 +233,7 @@ static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIV
  * If a timer has expired, process it.  Otherwise, block the timer service task
  * until either a timer does expire or a command is received.
  */
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, const BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
+static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
 
 /*-----------------------------------------------------------*/
 
@@ -318,6 +318,8 @@ BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommand
 BaseType_t xReturn = pdFAIL;
 DaemonTaskMessage_t xMessage;
 
+	configASSERT( xTimer );
+
 	/* Send a message to the timer service task to perform a particular action
 	on a particular timer definition. */
 	if( xTimerQueue != NULL )
@@ -371,6 +373,7 @@ const char * pcTimerGetTimerName( TimerHandle_t xTimer )
 {
 Timer_t *pxTimer = ( Timer_t * ) xTimer;
 
+	configASSERT( xTimer );
 	return pxTimer->pcTimerName;
 }
 /*-----------------------------------------------------------*/
@@ -439,7 +442,7 @@ BaseType_t xListWasEmpty;
 }
 /*-----------------------------------------------------------*/
 
-static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, const BaseType_t xListWasEmpty )
+static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
 {
 TickType_t xTimeNow;
 BaseType_t xTimerListsWereSwitched;
@@ -468,7 +471,14 @@ BaseType_t xTimerListsWereSwitched;
 				received - whichever comes first.  The following line cannot
 				be reached unless xNextExpireTime > xTimeNow, except in the
 				case when the current timer list is empty. */
-				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ) );
+				if( xListWasEmpty != pdFALSE )
+				{
+					/* The current timer list is empty - is the overflow list
+					also empty? */
+					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
+				}
+
+				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 
 				if( xTaskResumeAll() == pdFALSE )
 				{
@@ -810,6 +820,8 @@ BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
 BaseType_t xTimerIsInActiveList;
 Timer_t *pxTimer = ( Timer_t * ) xTimer;
 
+	configASSERT( xTimer );
+
 	/* Is the timer in the list of active timers? */
 	taskENTER_CRITICAL();
 	{

ThirdParty/sw_services/lwip141/data/lwip141.mld

@@ -6,7 +6,7 @@ BEGIN LIBRARY lwip141
   OPTION copyfiles = all;
   OPTION desc = "lwIP TCP/IP Stack library: lwIP v1.4.1";
   OPTION app_linker_flags = "-Wl,--start-group,-lxil,-llwip4,-lgcc,-lc,--end-group";
-  OPTION requires_os = (standalone xilkernel freertos821_xilinx);
+  OPTION requires_os = (standalone xilkernel freertos823_xilinx);
   OPTION NAME = lwip141;
 
   PARAM name = api_mode, desc = "Mode of operation for lwIP (RAW API/Sockets API)", type = enum, values = ("RAW API" = RAW_API, "SOCKET API" = SOCKET_API), default = RAW_API;

ThirdParty/sw_services/lwip141/data/lwip141.tcl

@@ -239,7 +239,7 @@ proc lwip_sw_drc {libhandle emacs_list} {
 		set os_handle [hsi::get_os]
 		set os_name [common::get_property NAME $os_handle]
 		if { [string compare -nocase "xilkernel" $os_name] != 0} {
-			if { [string compare -nocase "freertos821_xilinx" $os_name] != 0} {
+			if { [string compare -nocase "freertos823_xilinx" $os_name] != 0} {
 				error "ERROR: lwIP with Sockets requires \"xilkernel or freertos\" OS" "" "mdt_error"
 			}
 		}
@@ -443,11 +443,11 @@ proc generate_lwip_opts {libhandle} {
 			puts $lwipopts_fd "\#define TCPIP_THREAD_STACKSIZE 4096"
 			puts $lwipopts_fd ""
 		}
-		if { [string compare -nocase "freertos821_xilinx" $os_name] == 0} {
+		if { [string compare -nocase "freertos823_xilinx" $os_name] == 0} {
 			puts $lwipopts_fd "\#define OS_IS_FREERTOS"
 			puts $lwipopts_fd "\#define DEFAULT_THREAD_PRIO $thread_prio"
 			puts $lwipopts_fd "\#define TCPIP_THREAD_PRIO ($thread_prio + 1)"
-			puts $lwipopts_fd "\#define TCPIP_THREAD_STACKSIZE 4096"
+			puts $lwipopts_fd "\#define TCPIP_THREAD_STACKSIZE 1024"
 			puts $lwipopts_fd "\#define DEFAULT_TCP_RECVMBOX_SIZE 	200"
 			puts $lwipopts_fd "\#define DEFAULT_ACCEPTMBOX_SIZE 	5"
 			puts $lwipopts_fd "\#define TCPIP_MBOX_SIZE		200"

ThirdParty/sw_services/lwip141/src/ChangeLog

@@ -1,5 +1,11 @@
 Change Log for lwip
 =================================
+2015-10-12
+	* Created a new version lwip141_v1_3.
+	* Made changes in xemacpsif_dma.c to add required barriers.
+	* Remove repeated sysarch protect and unprotect calls.
+	* Replace printf with xil_printf.
+	* Add support for TI phy.
 2015-09-09
 	* Fix compilation issues with the non hier axi eth design
 2015-09-04

ThirdParty/sw_services/lwip141/src/contrib/ports/xilinx/include/arch/cc.h

@@ -95,6 +95,6 @@ typedef unsigned long mem_ptr_t;
 #define PACK_STRUCT_END
 
 #define LWIP_PLATFORM_ASSERT(x)
-#define LWIP_PLATFORM_DIAG(x) do { printf x; } while(0)
+#define LWIP_PLATFORM_DIAG(x) do { xil_printf x; } while(0)
 
 #endif /* __ARCH_CC_H__ */

ThirdParty/sw_services/lwip141/src/contrib/ports/xilinx/netif/xadapter.c

@@ -176,7 +176,7 @@ xemac_add(struct netif *netif,
 #endif
 #endif
 			default:
-				printf("unable to determine type of EMAC with baseaddress 0x%08x\r\n",
+				xil_printf("unable to determine type of EMAC with baseaddress 0x%08x\r\n",
 						mac_baseaddr);
 				return NULL;
 	}
@@ -216,9 +216,7 @@ xemacif_input(struct netif *netif)
 	switch (emac->type) {
 		case xemac_type_xps_emaclite:
 #ifdef XLWIP_CONFIG_INCLUDE_EMACLITE
-			SYS_ARCH_PROTECT(lev);
 			n_packets = xemacliteif_input(netif);
-			SYS_ARCH_UNPROTECT(lev);
 			break;
 #else
 			print("incorrect configuration: xps_ethernetlite drivers not present?");
@@ -227,9 +225,7 @@ xemacif_input(struct netif *netif)
 #endif
 		case xemac_type_axi_ethernet:
 #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET
-			SYS_ARCH_PROTECT(lev);
 			n_packets = xaxiemacif_input(netif);
-			SYS_ARCH_UNPROTECT(lev);
 			break;
 #else
 			print("incorrect configuration: axi_ethernet drivers not present?");
@@ -239,9 +235,7 @@ xemacif_input(struct netif *netif)
 #if defined (__arm__) || defined (__aarch64__)
 		case xemac_type_emacps:
 #ifdef XLWIP_CONFIG_INCLUDE_GEM
-			SYS_ARCH_PROTECT(lev);
 			n_packets = xemacpsif_input(netif);
-			SYS_ARCH_UNPROTECT(lev);
 			break;
 #else
 			xil_printf("incorrect configuration: ps7_ethernet drivers not present?\r\n");

ThirdParty/sw_services/lwip141/src/contrib/ports/xilinx/netif/xemacpsif_dma.c

@@ -63,8 +63,9 @@
 /* Byte alignment of BDs */
 #define BD_ALIGNMENT (XEMACPS_DMABD_MINIMUM_ALIGNMENT*2)
 
-static s32_t tx_pbufs_storage[2*XLWIP_CONFIG_N_TX_DESC];
-static s32_t rx_pbufs_storage[2*XLWIP_CONFIG_N_RX_DESC];
+/* A max of 4 different ethernet interfaces are supported */
+static s32_t tx_pbufs_storage[4*XLWIP_CONFIG_N_TX_DESC];
+static s32_t rx_pbufs_storage[4*XLWIP_CONFIG_N_RX_DESC];
 
 static s32_t emac_intr_num;
 
@@ -133,6 +134,61 @@ s32_t is_tx_space_available(xemacpsif_s *emac)
 	return freecnt;
 }
 
+
+static inline
+u32_t get_base_index_txpbufsstorage (xemacpsif_s *xemacpsif)
+{
+	u32_t index;
+#ifdef XPAR_XEMACPS_0_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_0_BASEADDR) {
+		index = 0;
+	}
+#endif
+#ifdef XPAR_XEMACPS_1_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_1_BASEADDR) {
+		index = XLWIP_CONFIG_N_TX_DESC;
+	}
+#endif
+#ifdef XPAR_XEMACPS_2_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_2_BASEADDR) {
+		index = 2 * XLWIP_CONFIG_N_TX_DESC;
+	}
+#endif
+#ifdef XPAR_XEMACPS_3_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_3_BASEADDR) {
+		index = 3 * XLWIP_CONFIG_N_TX_DESC;
+	}
+#endif
+	return index;
+}
+
+static inline
+u32_t get_base_index_rxpbufsstorage (xemacpsif_s *xemacpsif)
+{
+	u32_t index;
+#ifdef XPAR_XEMACPS_0_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_0_BASEADDR) {
+		index = 0;
+	}
+#endif
+#ifdef XPAR_XEMACPS_1_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_1_BASEADDR) {
+		index = XLWIP_CONFIG_N_RX_DESC;
+	}
+#endif
+#ifdef XPAR_XEMACPS_2_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_2_BASEADDR) {
+		index = 2 * XLWIP_CONFIG_N_RX_DESC;
+	}
+#endif
+#ifdef XPAR_XEMACPS_3_BASEADDR
+	if (xemacpsif->emacps.Config.BaseAddress == XPAR_XEMACPS_3_BASEADDR) {
+		index = 3 * XLWIP_CONFIG_N_RX_DESC;
+	}
+#endif
+	return index;
+}
+
 void process_sent_bds(xemacpsif_s *xemacpsif, XEmacPs_BdRing *txring)
 {
 	XEmacPs_Bd *txbdset;
@@ -143,11 +199,9 @@ void process_sent_bds(xemacpsif_s *xemacpsif, XEmacPs_BdRing *txring)
 	u32_t bdindex;
 	struct pbuf *p;
 	UINTPTR *temp;
-	u32_t index = 0;
+	u32_t index;
 
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index = sizeof(s32_t) * XLWIP_CONFIG_N_TX_DESC;
-	}
+	index = get_base_index_txpbufsstorage (xemacpsif);
 
 	while (1) {
 		/* obtain processed BD's */
@@ -222,16 +276,14 @@ XStatus emacps_sgsend(xemacpsif_s *xemacpsif, struct pbuf *p)
 	XEmacPs_BdRing *txring;
 	u32_t bdindex;
 	u32_t lev;
-	u32_t index = 0;
+	u32_t index;
 
 	lev = mfcpsr();
 	mtcpsr(lev | 0x000000C0);
 
 	txring = &(XEmacPs_GetTxRing(&xemacpsif->emacps));
 
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index = sizeof(s32_t) * XLWIP_CONFIG_N_TX_DESC;
-	}
+	index = get_base_index_txpbufsstorage (xemacpsif);
 
 	/* first count the number of pbufs */
 	for (q = p, n_pbufs = 0; q != NULL; q = q->next)
@@ -286,6 +338,10 @@ XStatus emacps_sgsend(xemacpsif_s *xemacpsif, struct pbuf *p)
 		txbd = XEmacPs_BdRingNext(txring, txbd);
 	}
 	XEmacPs_BdClearTxUsed(temp_txbd);
+#if defined (ARMR5) || defined (ARMA53)
+#else
+			dsb();
+#endif
 
 	status = XEmacPs_BdRingToHw(txring, n_pbufs, txbdset);
 	if (status != XST_SUCCESS) {
@@ -311,11 +367,9 @@ void setup_rx_bds(xemacpsif_s *xemacpsif, XEmacPs_BdRing *rxring)
 	u32_t freebds;
 	u32_t bdindex;
 	UINTPTR *temp;
-	u32_t index = 0;
+	u32_t index;
 
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index = sizeof(s32_t) * XLWIP_CONFIG_N_RX_DESC;
-	}
+	index = get_base_index_rxpbufsstorage (xemacpsif);
 
 	freebds = XEmacPs_BdRingGetFreeCnt (rxring);
 	while (freebds > 0) {
@@ -358,6 +412,10 @@ void setup_rx_bds(xemacpsif_s *xemacpsif, XEmacPs_BdRing *rxring)
 		}
 		temp++;
 		*temp = 0;
+#if defined (ARMR5) || defined (ARMA53)
+#else
+			dsb();
+#endif
 
 		XEmacPs_BdSetAddressRx(rxbd, (UINTPTR)p->payload);
 		rx_pbufs_storage[index + bdindex] = (s32_t)p;
@@ -375,7 +433,7 @@ void emacps_recv_handler(void *arg)
 	s32_t rx_bytes, k;
 	u32_t bdindex;
 	u32_t regval;
-	u32_t index = 0;
+	u32_t index;
 	u32_t gigeversion;
 
 	xemac = (struct xemac_s *)(arg);
@@ -387,9 +445,7 @@ void emacps_recv_handler(void *arg)
 #endif
 
 	gigeversion = ((Xil_In32(xemacpsif->emacps.Config.BaseAddress + 0xFC)) >> 16) & 0xFFF;
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index = sizeof(s32_t) * XLWIP_CONFIG_N_RX_DESC;
-	}
+	index = get_base_index_rxpbufsstorage (xemacpsif);
 	/*
 	 * If Reception done interrupt is asserted, call RX call back function
 	 * to handle the processed BDs and then raise the according flag.
@@ -474,7 +530,7 @@ XStatus init_dma(struct xemac_s *xemac)
 	s32_t i;
 	u32_t bdindex;
 	volatile UINTPTR tempaddress;
-	u32_t index = 0;
+	u32_t index;
 	u32_t gigeversion;
 	XEmacPs_Bd *bdtxterminate;
 	XEmacPs_Bd *bdrxterminate;
@@ -483,9 +539,7 @@ XStatus init_dma(struct xemac_s *xemac)
 	xemacpsif_s *xemacpsif = (xemacpsif_s *)(xemac->state);
 	struct xtopology_t *xtopologyp = &xtopology[xemac->topology_index];
 
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index = sizeof(s32_t) * XLWIP_CONFIG_N_RX_DESC;
-	}
+	index = get_base_index_rxpbufsstorage (xemacpsif);
 	gigeversion = ((Xil_In32(xemacpsif->emacps.Config.BaseAddress + 0xFC)) >> 16) & 0xFFF;
 	/*
 	 * The BDs need to be allocated in uncached memory. Hence the 1 MB
@@ -709,12 +763,10 @@ void resetrx_on_no_rxdata(xemacpsif_s *xemacpsif)
 void free_txrx_pbufs(xemacpsif_s *xemacpsif)
 {
 	s32_t index;
-	s32_t index1 = 0;
+	s32_t index1;
 	struct pbuf *p;
 
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index1 = sizeof(s32_t) * XLWIP_CONFIG_N_TX_DESC;
-    }
+	index1 = get_base_index_txpbufsstorage (xemacpsif);
 
 	for (index = index1; index < (index1 + XLWIP_CONFIG_N_TX_DESC); index++) {
 		if (tx_pbufs_storage[index] != 0) {
@@ -734,12 +786,10 @@ void free_txrx_pbufs(xemacpsif_s *xemacpsif)
 void free_onlytx_pbufs(xemacpsif_s *xemacpsif)
 {
 	s32_t index;
-	s32_t index1 = 0;
+	s32_t index1;
 	struct pbuf *p;
 
-	if (xemacpsif->emacps.Config.BaseAddress != XPAR_XEMACPS_0_BASEADDR) {
-		index1 = sizeof(s32_t) * XLWIP_CONFIG_N_TX_DESC;
-    }
+	index1 = get_base_index_txpbufsstorage (xemacpsif);
 	for (index = index1; index < (index1 + XLWIP_CONFIG_N_TX_DESC); index++) {
 		if (tx_pbufs_storage[index] != 0) {
 			p = (struct pbuf *)tx_pbufs_storage[index];

ThirdParty/sw_services/lwip141/src/contrib/ports/xilinx/netif/xemacpsif_physpeed.c

@@ -155,12 +155,22 @@
 #define PHY_IDENTIFIER_1_REG					2
 #define PHY_DETECT_MASK 					0x1808
 #define PHY_MARVELL_IDENTIFIER				0x0141
+#define PHY_TI_IDENTIFIER					0x2000
 
 #define XEMACPS_GMII2RGMII_SPEED1000_FD		0x140
 #define XEMACPS_GMII2RGMII_SPEED100_FD		0x2100
 #define XEMACPS_GMII2RGMII_SPEED10_FD		0x100
 #define XEMACPS_GMII2RGMII_REG_NUM			0x10
 
+#define PHY_REGCR		0x0D
+#define PHY_ADDAR		0x0E
+#define PHY_RGMIIDCTL	0x86
+#define PHY_RGMIICTL	0x32
+#define PHY_STS			0x11
+
+#define PHY_REGCR_ADDR	0x001F
+#define PHY_REGCR_DATA	0x401F
+
 /* Frequency setting */
 #define SLCR_LOCK_ADDR			(XPS_SYS_CTRL_BASEADDR + 0x4)
 #define SLCR_UNLOCK_ADDR		(XPS_SYS_CTRL_BASEADDR + 0x8)
@@ -296,8 +306,9 @@ void detect_phy(XEmacPs *xemacpsp)
 
 			XEmacPs_PhyRead(xemacpsp, phy_addr, PHY_IDENTIFIER_1_REG,
 							&phy_reg);
-			if (phy_reg != PHY_MARVELL_IDENTIFIER) {
-				xil_printf("WARNING: Not a Marvell Ethernet PHY. Please verify the initialization sequence\r\n");
+			if ((phy_reg != PHY_MARVELL_IDENTIFIER) &&
+				(phy_reg != PHY_TI_IDENTIFIER)) {
+				xil_printf("WARNING: Not a Marvell or TI Ethernet PHY. Please verify the initialization sequence\r\n");
 			}
 		}
 	}
@@ -360,17 +371,150 @@ u32_t phy_setup (XEmacPs *xemacpsp, u32_t phy_addr)
 	return link_speed;
 }
 
-static u32_t get_IEEE_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
+static u32_t get_TI_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
 {
 	u16_t temp;
 	u16_t control;
 	u16_t status;
 	u16_t status_speed;
-	u32_t gigeversion = 2;
 	u32_t timeout_counter = 0;
 	u32_t temp_speed;
+	u32_t phyregtemp;
+	int i;
+	u32_t RetStatus;
 
-	gigeversion = ((Xil_In32(xemacpsp->Config.BaseAddress + 0xFC)) >> 16) & 0xFFF;
+	xil_printf("Start PHY autonegotiation \r\n");
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, 0x1F, (u16_t *)&phyregtemp);
+	phyregtemp |= 0x4000;
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, 0x1F, phyregtemp);
+	RetStatus = XEmacPs_PhyRead(xemacpsp, phy_addr, 0x1F, (u16_t *)&phyregtemp);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error during sw reset \n\r");
+		return XST_FAILURE;
+	}
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, 0, (u16_t *)&phyregtemp);
+	phyregtemp |= 0x8000;
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, 0, phyregtemp);
+
+	/*
+	 * Delay
+	 */
+	for(i=0;i<1000000000;i++);
+
+	RetStatus = XEmacPs_PhyRead(xemacpsp, phy_addr, 0, (u16_t *)&phyregtemp);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error during reset \n\r");
+		return XST_FAILURE;
+	}
+
+	/* FIFO depth */
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, 0x10, 0x5048);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, 0x10, phyregtemp);
+	RetStatus = XEmacPs_PhyRead(xemacpsp, phy_addr, 0x10, (u16_t *)&phyregtemp);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error writing to 0x10 \n\r");
+		return XST_FAILURE;
+	}
+
+	/* TX/RX tuning */
+	/* Write to PHY_RGMIIDCTL */
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_ADDR);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_ADDAR, PHY_RGMIIDCTL);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_DATA);
+	RetStatus = XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_ADDAR, 0xA8);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error in tuning");
+		return XST_FAILURE;
+	}
+
+	/* Read PHY_RGMIIDCTL */
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_ADDR);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_ADDAR, PHY_RGMIIDCTL);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_DATA);
+	RetStatus = XEmacPs_PhyRead(xemacpsp, phy_addr, PHY_ADDAR, (u16_t *)&phyregtemp);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error in tuning");
+		return XST_FAILURE;
+	}
+
+	/* Write PHY_RGMIICTL */
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_ADDR);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_ADDAR, PHY_RGMIICTL);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_DATA);
+	RetStatus = XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_ADDAR, 0xD3);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error in tuning");
+		return XST_FAILURE;
+	}
+
+	/* Read PHY_RGMIICTL */
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_ADDR);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_ADDAR, PHY_RGMIICTL);
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, PHY_REGCR, PHY_REGCR_DATA);
+	RetStatus = XEmacPs_PhyRead(xemacpsp, phy_addr, PHY_ADDAR, (u16_t *)&phyregtemp);
+	if (RetStatus != XST_SUCCESS) {
+		xil_printf("Error in tuning");
+		return XST_FAILURE;
+	}
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_AUTONEGO_ADVERTISE_REG, &control);
+	control |= IEEE_ASYMMETRIC_PAUSE_MASK;
+	control |= IEEE_PAUSE_MASK;
+	control |= ADVERTISE_100;
+	control |= ADVERTISE_10;
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_AUTONEGO_ADVERTISE_REG, control);
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
+					&control);
+	control |= ADVERTISE_1000;
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
+					control);
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_CONTROL_REG_OFFSET, &control);
+	control |= IEEE_CTRL_AUTONEGOTIATE_ENABLE;
+	control |= IEEE_STAT_AUTONEGOTIATE_RESTART;
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_CONTROL_REG_OFFSET, control);
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_CONTROL_REG_OFFSET, &control);
+	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_STATUS_REG_OFFSET, &status);
+
+	xil_printf("Waiting for PHY to complete autonegotiation.\r\n");
+
+	while ( !(status & IEEE_STAT_AUTONEGOTIATE_COMPLETE) ) {
+		sleep(1);
+		timeout_counter++;
+
+		if (timeout_counter == 30) {
+			xil_printf("Auto negotiation error \r\n");
+			return;
+		}
+		XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_STATUS_REG_OFFSET, &status);
+	}
+	xil_printf("autonegotiation complete \r\n");
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, PHY_STS, &status_speed);
+	if ((status_speed & 0xC000) == 0x8000) {
+		return 1000;
+	} else if ((status_speed & 0xC000) == 0x4000) {
+		return 100;
+	} else {
+		return 10;
+	}
+
+	return XST_SUCCESS;
+}
+
+static u32_t get_Marvell_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
+{
+	u16_t temp;
+	u16_t control;
+	u16_t status;
+	u16_t status_speed;
+	u32_t timeout_counter = 0;
+	u32_t temp_speed;
+	u32_t phyregtemp;
 
 	xil_printf("Start PHY autonegotiation \r\n");
 
@@ -388,19 +532,11 @@ static u32_t get_IEEE_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
 	control |= ADVERTISE_10;
 	XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_AUTONEGO_ADVERTISE_REG, control);
 
-	if (gigeversion == 2) {
-		XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
-						&control);
-		control |= ADVERTISE_1000;
-		XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
-						control);
-	} else {
-		XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
-						&control);
-		control &= ~ADVERTISE_1000;
-		XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
-						control);
-	}
+	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
+					&control);
+	control |= ADVERTISE_1000;
+	XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_1000_ADVERTISE_REG_OFFSET,
+					control);
 
 	XEmacPs_PhyWrite(xemacpsp, phy_addr, IEEE_PAGE_ADDRESS_REGISTER, 0);
 	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_COPPER_SPECIFIC_CONTROL_REG,
@@ -425,25 +561,27 @@ static u32_t get_IEEE_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
 		else
 			break;
 	}
-	xil_printf("Waiting for PHY to complete autonegotiation.\r\n");
 
 	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_STATUS_REG_OFFSET, &status);
+
+	xil_printf("Waiting for PHY to complete autonegotiation.\r\n");
+
 	while ( !(status & IEEE_STAT_AUTONEGOTIATE_COMPLETE) ) {
 		sleep(1);
-		XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_COPPER_SPECIFIC_STATUS_REG_2,
-																	&temp);
+		XEmacPs_PhyRead(xemacpsp, phy_addr,
+						IEEE_COPPER_SPECIFIC_STATUS_REG_2,  &temp);
 		timeout_counter++;
 
 		if (timeout_counter == 30) {
 			xil_printf("Auto negotiation error \r\n");
 			return;
 		}
-		XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_STATUS_REG_OFFSET,
-																&status);
-		}
+		XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_STATUS_REG_OFFSET, &status);
+	}
 	xil_printf("autonegotiation complete \r\n");
-	XEmacPs_PhyRead(xemacpsp, phy_addr, IEEE_SPECIFIC_STATUS_REG, &status_speed);
 
+	XEmacPs_PhyRead(xemacpsp, phy_addr,IEEE_SPECIFIC_STATUS_REG,
+					&status_speed);
 	if (status_speed & 0x400) {
 		temp_speed = status_speed & IEEE_SPEED_MASK;
 
@@ -455,6 +593,26 @@ static u32_t get_IEEE_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
 			return 10;
 	}
 
+	return XST_SUCCESS;
+}
+
+static u32_t get_IEEE_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr)
+{
+	u16_t phy_identity;
+	u32_t RetStatus;
+
+	XEmacPs_PhyRead(xemacpsp, phy_addr, PHY_IDENTIFIER_1_REG,
+					&phy_identity);
+	if (phy_identity == PHY_TI_IDENTIFIER) {
+		RetStatus = get_TI_phy_speed(xemacpsp, phy_addr);
+	} else {
+		RetStatus = get_Marvell_phy_speed(xemacpsp, phy_addr);
+	}
+	if (RetStatus != XST_SUCCESS) {
+		return RetStatus;
+	}
+
+	return XST_SUCCESS;
 }
 
 static u32_t configure_IEEE_phy_speed(XEmacPs *xemacpsp, u32_t phy_addr, u32_t speed)

ThirdParty/sw_services/xilopenamp/data/xilopenamp.mld

@@ -43,7 +43,7 @@ OPTION psf_version = 2.1;
 BEGIN LIBRARY xilopenamp
   OPTION DRC = openamp_drc;
   OPTION COPYFILES = all;
-  OPTION REQUIRES_OS = (standalone, freertos821_xilinx);
+  OPTION REQUIRES_OS = (standalone, freertos823_xilinx);
   OPTION APP_LINKER_FLAGS = "-Wl,--start-group,-lxil,-lxilopenamp,-lgcc,-lc,--end-group";
   OPTION DESC = "Xilinx openamp Library ";
   OPTION NAME = xilopenamp;

ThirdParty/sw_services/xilopenamp/data/xilopenamp.tcl

@@ -46,8 +46,8 @@ proc openamp_drc {libhandle} {
     set hw_processor [common::get_property HW_INSTANCE $proc_instance]
 
     set proc_type [common::get_property IP_NAME [hsi::get_cells -hier $hw_processor]];
-    if { $proc_type != "psu_cortexr5" } {
-                error "ERROR: This library is supported only for CortexR5 processors.";
+    if { ( $proc_type != "psu_cortexr5" ) && ( $proc_type != "ps7_cortexa9" ) } {
+                error "ERROR: This library is supported only for CortexR5 and CortexA9 processors.";
                 return;
     }
 }
@@ -86,7 +86,7 @@ proc xgen_opts_file {libhandle} {
 	puts $ampos "/******************************************************************/"
 	puts $ampos ""
 	puts $ampos "/* Operating System definition */"
-	if { $os == "freertos821_xilinx" } {
+	if { $os == "freertos823_xilinx" } {
 		puts $ampos "#define USE_FREERTOS TRUE"
 	      } else {
 		puts $ampos "#define USE_BAREMETAL TRUE"

ThirdParty/sw_services/xilopenamp/src/Makefile

@@ -53,7 +53,7 @@ INCLUDEFILES=*.h
 libs: libxilopenamp.a
 
 libxilopenamp.a: print_msg_xilopenamp $(OPENAMP_OBJS)
-	$(ARCHIVER) $(EXTRA_ARCHIVE_FLAGS) ${RELEASEDIR}/${LIB} ${OUTS}
+	$(ARCHIVER) $(EXTRA_ARCHIVE_FLAGS) ${RELEASEDIR}/${LIB} ${OPENAMP_OBJS}
 
 print_msg_xilopenamp:
 	@echo "Compiling XilOpenAMP Library"

ThirdParty/sw_services/xilopenamp/src/remoteproc.c

@@ -135,13 +135,16 @@ int remoteproc_resource_deinit(struct remote_proc *rproc) {
 
     env_deinit();
 
-    /* Disable the caches - This is required if master boots firmwares
-     * multiple times without hard reset on same core. If caches are
-     * not invalidated at this point in time then subsequent firmware
-     * boots on the same core may experience cache inconsistencies.
-     *
+    /*
+     * Flush and Invalidate the caches - When the application is built with
+     * Xilinx Standalone BSP, caches are invalidated as part of boot process.
+     * Even if the master boots firmware multiple times without hard reset on
+     * same core, caches are flushed and invalidated at the end of
+     * remoteproc_resource_deinit for this run and caches would be again
+     * invalidated before starting the main thread of the application on next
+     * run to avoid any cache inconsistencies.
      */
-    env_disable_cache();
+    platform_cache_all_flush_invalidate();
 
     return RPROC_SUCCESS;
 }

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+  <div class="headertitle">
+<div class="title">File List</div>  </div>
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+<div class="textblock">Here is a list of all documented files with brief descriptions:</div><div class="directory">
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+<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span class="icondoc"></span><a class="el" href="xaxicdma_8c.html" target="_self">xaxicdma.c</a></td><td class="desc"></td></tr>
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+</div><!-- directory -->
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+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
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+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axicdma
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+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
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+<li>XAXICDMA_BD_ADDRLEN_OFFSET
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+<li>XAXICDMA_BD_BUFSRC_MSB_OFFSET
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+<li>XAXICDMA_BD_CTRL_LENGTH_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga08590ca37cda0c7e7648f8b58bb70d94">xaxicdma_hw.h</a>
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+<li>XAXICDMA_BD_HASDRE_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga8e9efcc5a93543b6a6c75ab211ed8318">xaxicdma_hw.h</a>
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+: <a class="el" href="group__axicdma__v4__0.html#ga17eecb43d41d19d66cca58097dec4891">xaxicdma_hw.h</a>
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+<li>XAXICDMA_BD_ISLITE_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaadb078c2f018d8422e66ebaaf4149712">xaxicdma_hw.h</a>
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+<li>XAXICDMA_BD_MAX_LEN_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga6d00373734319bbfc1f81b2df043e0c4">xaxicdma_hw.h</a>
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+<li>XAXICDMA_BD_MINIMUM_ALIGNMENT
+: <a class="el" href="group__axicdma__v4__0.html#gaae822f32753ddd2fec7be5d3c9e9a4ff">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_NDESC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga73442468eff68f4fac6ca04f7d66b3bc">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_NDESC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaac93627274e0a7ff4e45613eddd60d64">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_NUM_WORDS
+: <a class="el" href="group__axicdma__v4__0.html#ga710808485441a384edf28b803363f3dd">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_PHYS_ADDR_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gac3b26e44089dbe1e471eb9aedc6797fa">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_PHYS_ADDR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga2dac41e5e3020258ed9ff6f2c5299e85">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_START_CLEAR
+: <a class="el" href="group__axicdma__v4__0.html#ga7a4abf2f49cd4e47db090ef83c1d4224">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_ALL_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gab72e831b0648742189a2623b040166b7">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaff5819b9b557b391de8b69c7c730b492">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_COMPLETE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gac206252f0aeb8a2f8c28aaf7c0f8361e">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_DEC_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga5beb3dd9b31ecb304f698bab67ca81b3">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_INT_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga36516a3195bb957d00ef16b9f2ddf671">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga9bc60587fa8dd61bb342dff49b7c8fc8">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_SLV_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga23cf4a9370aec62b2000113b6709e92a">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_TO_CLEAR
+: <a class="el" href="group__axicdma__v4__0.html#gab4e667853d75008ef5a74aca06762980">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_WORDLEN_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gac5ef7101904b47a4ec640bedec49e0fc">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_BdClear()
+: <a class="el" href="group__axicdma__v4__0.html#ga594480d7591185014d72869ac15fd490">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdClearSts()
+: <a class="el" href="group__axicdma__v4__0.html#ga5ee87642c7b803ad1543c5f839872594">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdClone()
+: <a class="el" href="group__axicdma__v4__0.html#gaa16c4a61c0b1b2892ee5869e62546884">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetDstBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#gae95f4fe35bf907a14c7ec44dcc2f0033">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetLength()
+: <a class="el" href="group__axicdma__v4__0.html#ga2d0201500b1c123a0eb67c02f9666598">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetNextPtr()
+: <a class="el" href="group__axicdma__v4__0.html#ga2091d8d3a0a4743a557307b1153b4791">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetPhysAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga535e9b3301b3227aed27e42961304165">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetSrcBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#gae42ce84dde541ca08b7995ded0e164cb">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetSts()
+: <a class="el" href="group__axicdma__v4__0.html#ga25c6311cbd4ac7c3a1dec2e2a59c0bf7">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdRingAlloc()
+: <a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingClone()
+: <a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingCntCalc()
+: <a class="el" href="group__axicdma__v4__0.html#gabf6db470a391644bdd03727d17bcb0d6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingCreate()
+: <a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingFree()
+: <a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingFromHw()
+: <a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingGetCnt()
+: <a class="el" href="group__axicdma__v4__0.html#ga6dda9c5b4ded0bdbf1e85d6532461ef6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingGetCurrBd()
+: <a class="el" href="group__axicdma__v4__0.html#gab6f6efa84ee457f155a4c7a94e4227da">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingGetFreeCnt()
+: <a class="el" href="group__axicdma__v4__0.html#ga07f505ed309a6eb2172e7e8e154fa082">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingMemCalc()
+: <a class="el" href="group__axicdma__v4__0.html#ga1525cddb18badb5737c1017f2a0d34e1">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingNext()
+: <a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingPrev()
+: <a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingSnapShotCurrBd()
+: <a class="el" href="group__axicdma__v4__0.html#ga4677cddba8354ca3979f9b6ae386ffde">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingToHw()
+: <a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingUnAlloc()
+: <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdSetCurBdPtr()
+: <a class="el" href="group__axicdma__v4__0.html#gae1333cf9309c85b0f620e026c889e01c">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdSetDstBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga2b4866bb4184857c6de973d76f7e7e71">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetHasDRE()
+: <a class="el" href="group__axicdma__v4__0.html#ga270070a493422c1d6f64842febb012d8">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetIsLite()
+: <a class="el" href="group__axicdma__v4__0.html#ga1025e9931f9d6fc4b7a0d526169eeab0">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetLength()
+: <a class="el" href="group__axicdma__v4__0.html#ga3467e25f29ab081f1d9b0a1a685adbfa">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetMaxLen()
+: <a class="el" href="group__axicdma__v4__0.html#ga03aff38e0c27e9925e4a79986e351e0d">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetNextPtr()
+: <a class="el" href="group__axicdma__v4__0.html#gab4d51959154b33364f8e3104c4a1afb0">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetPhysAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga27a4cefa4eee7b30158763c0619c725b">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetSrcBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga18cd5efedba0025703b7c3a845f52cad">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetTailBdPtr()
+: <a class="el" href="group__axicdma__v4__0.html#ga1141024e912e7012d2c716cef9fc791f">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdSetWordLen()
+: <a class="el" href="group__axicdma__v4__0.html#ga7956eaa8a90bcf2a0894d513b9c15639">xaxicdma_bd.c</a>
+</li>
+<li>XAXICDMA_BTT_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaf2b93c5bebf2fdcf9516bcfefc7ae356">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CDESC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaac2ba51f1e81b8ed8fe31bc5632d2980">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CDESC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaf62f028c2ed24dea6e0ebf8388cdf670">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_CfgInitialize()
+: <a class="el" href="group__axicdma__v4__0.html#gaadefa567a30eb3ab3213919fff7d3f9b">xaxicdma.c</a>
+</li>
+<li>XAXICDMA_COALESCE_MAX
+: <a class="el" href="group__axicdma__v4__0.html#ga0bb5457c991743bf45e9db3201df17ed">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_KHOLE_RD_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gac31916a2867c9e47834091131d449f88">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_KHOLE_WR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga5ddbb13c86e6c75d5dd928447e3ec8bb">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga1f23c9a4fe3565eb423286405a1de5ca">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_RESET_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga0f6d1104468e9f155a3b9477a84531a6">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_SGMODE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gae0e7fa6cee94c02784164c315268c6a6">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DELAY_MAX
+: <a class="el" href="group__axicdma__v4__0.html#ga5c26fb92eb7913f78454aeaae8f91115">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DESC_LSB_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaca543a8c03c6cd2d6d7284cc4bd119c2">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DSTADDR_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga9a61d8801792647638b54afcafbd8a86">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DSTADDR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga3064fdc2bc683fa002bedf51498d810c">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_DumpBd()
+: <a class="el" href="group__axicdma__v4__0.html#ga37f4ecb500f691583798662804d5da18">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_DumpRegisters()
+: <a class="el" href="group__axicdma__v4__0.html#ga3287c31f1aa41a1e4a535af134324524">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_GetCoalesce()
+: <a class="el" href="group__axicdma__v4__0.html#ga92087f03877293982f895e8178557f6a">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_GetError()
+: <a class="el" href="group__axicdma__v4__0.html#gae1fbdb8f7ad8926f744c771e07814f72">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_IntrDisable()
+: <a class="el" href="group__axicdma__v4__0.html#gabdccf08d74f4e037b06a36a2e9db2877">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IntrEnable()
+: <a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IntrGetEnabled()
+: <a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IntrHandler()
+: <a class="el" href="group__axicdma__v4__0.html#ga8acd5bf5f5f072c6e425a8cc1b589498">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IsBusy()
+: <a class="el" href="group__axicdma__v4__0.html#gaee6e140ed15cd9b7e49145e01220115a">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_LookupConfig()
+: <a class="el" href="group__axicdma__v4__0.html#ga3ecc6331ed89e613e7f1fb53f45a4cb0">xaxicdma.h</a>
+</li>
+<li>XAXICDMA_MAX_TRANSFER_LEN
+: <a class="el" href="group__axicdma__v4__0.html#gac84f0c20f910716d8f3e48ff23294440">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_ReadReg
+: <a class="el" href="group__axicdma__v4__0.html#gafcbfb5805f763b09fd93a283afa8a55e">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_Reset()
+: <a class="el" href="group__axicdma__v4__0.html#gaaf97cc8317af0bf1678973925beff0c5">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_ResetIsDone()
+: <a class="el" href="group__axicdma__v4__0.html#ga2575375744593bd55425365dde7744e5">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_SelectKeyHole()
+: <a class="el" href="group__axicdma__v4__0.html#ga815f36efce97dba797f67f9acbbb761d">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_SetCoalesce()
+: <a class="el" href="group__axicdma__v4__0.html#ga91adf55050cb617cee00b0ba2f0d754e">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_SimpleTransfer()
+: <a class="el" href="group__axicdma__v4__0.html#ga1e81ba2046ada4a40527c50ee7fdce9a">xaxicdma.c</a>
+</li>
+<li>XAXICDMA_SR_ERR_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gabec2417b4096d65fa8f07a84eef38cea">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_DECODE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga9bdb5e1000af0d05ba0b9481e71b5d2d">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_INTERNAL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga9c4d04c2dc3d2601d5e63067a7e5e751">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SG_DEC_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaab7404d4487c554b8d6c8c984732c46e">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SG_INT_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga67ecbbc57656c5e82c86541961cef427">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SG_SLV_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gad47677d061063e96f50b5d28af989879">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SLAVE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga95a6cfba374a96cfc1f899bda9cdc9bc">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_IDLE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga73bb174cc046fe8f5d51da6f2d11cfaa">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaa5e9b49d3805237bc9ed772948fbf4ae">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_SGINCLD_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gada1a00e54aeb12049cd23a005eb47c52">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SRCADDR_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaeca7eef88c0b04de01219565d5039d93">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SRCADDR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga53c4bf8e65e8770c6fe129160ad07e29">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_TDESC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaed7af011eefd18c937d40571593b9297">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_TDESC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga5a00af58a865daf4ee6995ade0c9cdd1">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_WriteReg
+: <a class="el" href="group__axicdma__v4__0.html#gad6d4705f0ef363ca8d3dab00df58728f">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_COALESCE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga156955220ded772774e8146b2ff6e7d6">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_DELAY_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga20aec8c77e90ca555dc44341c40af592">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gad2b921e876e581f84be0e7c152d13221">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_DELAY_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga615ffaf234787866d781bf67b214dda3">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_ERROR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaa4987449eeea265c2cbe875a7eed3ee8">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_IOC_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga7f2c9f2df6f106e9576ec6d0d0448e0b">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_SIMPLE_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga14246912a21d68d0dde910704b6d0ac6">xaxicdma_hw.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_defs.html

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+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axicdma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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+      <li class="current"><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
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+  <div id="navrow3" class="tabs2">
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+      <li><a href="globals.html"><span>All</span></a></li>
+      <li><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li class="current"><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li class="current"><a href="#index_x"><span>x</span></a></li>
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+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
+<li>XAXICDMA_BD_ADDRLEN_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga0d0d6c6e655e662017785bd3afb8ff1e">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_BUFDST_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga3950ca65fb96bad92246c88399f38d89">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_BUFDST_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gacd2dd9425a21034814a89119ff957528">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_BUFSRC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga62a39b3ce53b54ba5641b4ad654054a4">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_BUFSRC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaf29c4c37b3f8d6fee34a0f6e014a80d3">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_CTRL_LEN_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga7153a14322b05f4845ac7796f6ab92fa">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_CTRL_LENGTH_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga08590ca37cda0c7e7648f8b58bb70d94">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_HASDRE_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga8e9efcc5a93543b6a6c75ab211ed8318">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_HW_NUM_BYTES
+: <a class="el" href="group__axicdma__v4__0.html#ga17eecb43d41d19d66cca58097dec4891">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_ISLITE_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaadb078c2f018d8422e66ebaaf4149712">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_MAX_LEN_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga6d00373734319bbfc1f81b2df043e0c4">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_MINIMUM_ALIGNMENT
+: <a class="el" href="group__axicdma__v4__0.html#gaae822f32753ddd2fec7be5d3c9e9a4ff">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_NDESC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga73442468eff68f4fac6ca04f7d66b3bc">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_NDESC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaac93627274e0a7ff4e45613eddd60d64">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_NUM_WORDS
+: <a class="el" href="group__axicdma__v4__0.html#ga710808485441a384edf28b803363f3dd">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_PHYS_ADDR_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gac3b26e44089dbe1e471eb9aedc6797fa">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_PHYS_ADDR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga2dac41e5e3020258ed9ff6f2c5299e85">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_START_CLEAR
+: <a class="el" href="group__axicdma__v4__0.html#ga7a4abf2f49cd4e47db090ef83c1d4224">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_ALL_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gab72e831b0648742189a2623b040166b7">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaff5819b9b557b391de8b69c7c730b492">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_COMPLETE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gac206252f0aeb8a2f8c28aaf7c0f8361e">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_DEC_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga5beb3dd9b31ecb304f698bab67ca81b3">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_INT_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga36516a3195bb957d00ef16b9f2ddf671">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga9bc60587fa8dd61bb342dff49b7c8fc8">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_STS_SLV_ERR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga23cf4a9370aec62b2000113b6709e92a">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_TO_CLEAR
+: <a class="el" href="group__axicdma__v4__0.html#gab4e667853d75008ef5a74aca06762980">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BD_WORDLEN_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gac5ef7101904b47a4ec640bedec49e0fc">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_BTT_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaf2b93c5bebf2fdcf9516bcfefc7ae356">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CDESC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaac2ba51f1e81b8ed8fe31bc5632d2980">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CDESC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaf62f028c2ed24dea6e0ebf8388cdf670">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_COALESCE_MAX
+: <a class="el" href="group__axicdma__v4__0.html#ga0bb5457c991743bf45e9db3201df17ed">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_KHOLE_RD_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gac31916a2867c9e47834091131d449f88">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_KHOLE_WR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga5ddbb13c86e6c75d5dd928447e3ec8bb">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga1f23c9a4fe3565eb423286405a1de5ca">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_RESET_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga0f6d1104468e9f155a3b9477a84531a6">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_CR_SGMODE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gae0e7fa6cee94c02784164c315268c6a6">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DELAY_MAX
+: <a class="el" href="group__axicdma__v4__0.html#ga5c26fb92eb7913f78454aeaae8f91115">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DESC_LSB_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaca543a8c03c6cd2d6d7284cc4bd119c2">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DSTADDR_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga9a61d8801792647638b54afcafbd8a86">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_DSTADDR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga3064fdc2bc683fa002bedf51498d810c">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_MAX_TRANSFER_LEN
+: <a class="el" href="group__axicdma__v4__0.html#gac84f0c20f910716d8f3e48ff23294440">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_ReadReg
+: <a class="el" href="group__axicdma__v4__0.html#gafcbfb5805f763b09fd93a283afa8a55e">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gabec2417b4096d65fa8f07a84eef38cea">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_DECODE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga9bdb5e1000af0d05ba0b9481e71b5d2d">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_INTERNAL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga9c4d04c2dc3d2601d5e63067a7e5e751">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SG_DEC_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaab7404d4487c554b8d6c8c984732c46e">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SG_INT_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga67ecbbc57656c5e82c86541961cef427">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SG_SLV_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gad47677d061063e96f50b5d28af989879">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_ERR_SLAVE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga95a6cfba374a96cfc1f899bda9cdc9bc">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_IDLE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga73bb174cc046fe8f5d51da6f2d11cfaa">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaa5e9b49d3805237bc9ed772948fbf4ae">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SR_SGINCLD_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gada1a00e54aeb12049cd23a005eb47c52">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SRCADDR_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaeca7eef88c0b04de01219565d5039d93">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_SRCADDR_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga53c4bf8e65e8770c6fe129160ad07e29">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_TDESC_MSB_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#gaed7af011eefd18c937d40571593b9297">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_TDESC_OFFSET
+: <a class="el" href="group__axicdma__v4__0.html#ga5a00af58a865daf4ee6995ade0c9cdd1">xaxicdma_hw.h</a>
+</li>
+<li>XAxiCdma_WriteReg
+: <a class="el" href="group__axicdma__v4__0.html#gad6d4705f0ef363ca8d3dab00df58728f">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_COALESCE_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga156955220ded772774e8146b2ff6e7d6">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_DELAY_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga20aec8c77e90ca555dc44341c40af592">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gad2b921e876e581f84be0e7c152d13221">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_DELAY_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga615ffaf234787866d781bf67b214dda3">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_ERROR_MASK
+: <a class="el" href="group__axicdma__v4__0.html#gaa4987449eeea265c2cbe875a7eed3ee8">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_IOC_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga7f2c9f2df6f106e9576ec6d0d0448e0b">xaxicdma_hw.h</a>
+</li>
+<li>XAXICDMA_XR_IRQ_SIMPLE_ALL_MASK
+: <a class="el" href="group__axicdma__v4__0.html#ga14246912a21d68d0dde910704b6d0ac6">xaxicdma_hw.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_func.html

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+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axicdma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Overview</span></a></li>
+      <li class="current"><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li class="current"><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li class="current"><a href="#index_x"><span>x</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
+<li>XAxiCdma_BdClear()
+: <a class="el" href="group__axicdma__v4__0.html#ga594480d7591185014d72869ac15fd490">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdClearSts()
+: <a class="el" href="group__axicdma__v4__0.html#ga5ee87642c7b803ad1543c5f839872594">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdClone()
+: <a class="el" href="group__axicdma__v4__0.html#gaa16c4a61c0b1b2892ee5869e62546884">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetDstBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#gae95f4fe35bf907a14c7ec44dcc2f0033">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetLength()
+: <a class="el" href="group__axicdma__v4__0.html#ga2d0201500b1c123a0eb67c02f9666598">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetNextPtr()
+: <a class="el" href="group__axicdma__v4__0.html#ga2091d8d3a0a4743a557307b1153b4791">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetPhysAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga535e9b3301b3227aed27e42961304165">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetSrcBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#gae42ce84dde541ca08b7995ded0e164cb">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdGetSts()
+: <a class="el" href="group__axicdma__v4__0.html#ga25c6311cbd4ac7c3a1dec2e2a59c0bf7">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdRingAlloc()
+: <a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingClone()
+: <a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingCntCalc()
+: <a class="el" href="group__axicdma__v4__0.html#gabf6db470a391644bdd03727d17bcb0d6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingCreate()
+: <a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingFree()
+: <a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingFromHw()
+: <a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingGetCnt()
+: <a class="el" href="group__axicdma__v4__0.html#ga6dda9c5b4ded0bdbf1e85d6532461ef6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingGetCurrBd()
+: <a class="el" href="group__axicdma__v4__0.html#gab6f6efa84ee457f155a4c7a94e4227da">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingGetFreeCnt()
+: <a class="el" href="group__axicdma__v4__0.html#ga07f505ed309a6eb2172e7e8e154fa082">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingMemCalc()
+: <a class="el" href="group__axicdma__v4__0.html#ga1525cddb18badb5737c1017f2a0d34e1">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingNext()
+: <a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingPrev()
+: <a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingSnapShotCurrBd()
+: <a class="el" href="group__axicdma__v4__0.html#ga4677cddba8354ca3979f9b6ae386ffde">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingToHw()
+: <a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdRingUnAlloc()
+: <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdSetCurBdPtr()
+: <a class="el" href="group__axicdma__v4__0.html#gae1333cf9309c85b0f620e026c889e01c">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdSetDstBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga2b4866bb4184857c6de973d76f7e7e71">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetHasDRE()
+: <a class="el" href="group__axicdma__v4__0.html#ga270070a493422c1d6f64842febb012d8">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetIsLite()
+: <a class="el" href="group__axicdma__v4__0.html#ga1025e9931f9d6fc4b7a0d526169eeab0">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetLength()
+: <a class="el" href="group__axicdma__v4__0.html#ga3467e25f29ab081f1d9b0a1a685adbfa">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetMaxLen()
+: <a class="el" href="group__axicdma__v4__0.html#ga03aff38e0c27e9925e4a79986e351e0d">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetNextPtr()
+: <a class="el" href="group__axicdma__v4__0.html#gab4d51959154b33364f8e3104c4a1afb0">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetPhysAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga27a4cefa4eee7b30158763c0619c725b">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetSrcBufAddr()
+: <a class="el" href="group__axicdma__v4__0.html#ga18cd5efedba0025703b7c3a845f52cad">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_BdSetTailBdPtr()
+: <a class="el" href="group__axicdma__v4__0.html#ga1141024e912e7012d2c716cef9fc791f">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_BdSetWordLen()
+: <a class="el" href="group__axicdma__v4__0.html#ga7956eaa8a90bcf2a0894d513b9c15639">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_CfgInitialize()
+: <a class="el" href="group__axicdma__v4__0.html#gaadefa567a30eb3ab3213919fff7d3f9b">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_DumpBd()
+: <a class="el" href="group__axicdma__v4__0.html#ga37f4ecb500f691583798662804d5da18">xaxicdma_bd.c</a>
+</li>
+<li>XAxiCdma_DumpRegisters()
+: <a class="el" href="group__axicdma__v4__0.html#ga3287c31f1aa41a1e4a535af134324524">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_GetCoalesce()
+: <a class="el" href="group__axicdma__v4__0.html#ga92087f03877293982f895e8178557f6a">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_GetError()
+: <a class="el" href="group__axicdma__v4__0.html#gae1fbdb8f7ad8926f744c771e07814f72">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_IntrDisable()
+: <a class="el" href="group__axicdma__v4__0.html#gabdccf08d74f4e037b06a36a2e9db2877">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IntrEnable()
+: <a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IntrGetEnabled()
+: <a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IntrHandler()
+: <a class="el" href="group__axicdma__v4__0.html#ga8acd5bf5f5f072c6e425a8cc1b589498">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_IsBusy()
+: <a class="el" href="group__axicdma__v4__0.html#gaee6e140ed15cd9b7e49145e01220115a">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_LookupConfig()
+: <a class="el" href="group__axicdma__v4__0.html#ga3ecc6331ed89e613e7f1fb53f45a4cb0">xaxicdma.h</a>
+</li>
+<li>XAxiCdma_Reset()
+: <a class="el" href="group__axicdma__v4__0.html#gaaf97cc8317af0bf1678973925beff0c5">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_ResetIsDone()
+: <a class="el" href="group__axicdma__v4__0.html#ga2575375744593bd55425365dde7744e5">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_SelectKeyHole()
+: <a class="el" href="group__axicdma__v4__0.html#ga815f36efce97dba797f67f9acbbb761d">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_SetCoalesce()
+: <a class="el" href="group__axicdma__v4__0.html#ga91adf55050cb617cee00b0ba2f0d754e">xaxicdma.c</a>
+</li>
+<li>XAxiCdma_SimpleTransfer()
+: <a class="el" href="group__axicdma__v4__0.html#ga1e81ba2046ada4a40527c50ee7fdce9a">xaxicdma.c</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
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+</body>
+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/globals_type.html

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+   <div id="projectname">axicdma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
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+<!-- end header part -->
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+      <li class="current"><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
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+<div class="contents">
+&#160;<ul>
+<li>XAxiCdma_Bd
+: <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">xaxicdma_bd.h</a>
+</li>
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XilinxProcessorIPLib/drivers/axicdma/doc/html/api/index.html

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+   <div id="projectname">axicdma
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+  <div class="headertitle">
+<div class="title">axicdma Documentation</div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>This is the driver API for the AXI CDMA engine. For a full description of the features of the AXI CDMA engine, please refer to the hardware specification. This driver supports the following features:</p>
+<ul>
+<li>Simple DMA transfer</li>
+<li>Scatter gather (SG) DMA transfer</li>
+<li>Interrupt for error or completion of transfers</li>
+<li>For SG DMA transfer:<ul>
+<li>Programmable interrupt coalescing</li>
+<li>Programmable delay timer counter</li>
+<li>Managing the buffer descriptors (BDs)</li>
+</ul>
+</li>
+</ul>
+<p><b>Two Hardware Building Modes</b></p>
+<p>The hardware can be built in two modes:</p>
+<ul>
+<li><b>Simple only mode</b>, in this mode, only simple transfers are supported by the hardware. The functionality is similar to the XPS Central DMA, however, the driver API to do the transfer is slightly different.</li>
+<li><b>Hybrid mode</b>, in this mode, the hardware supports both the simple transfer and the SG transfer. However, only one kind of transfer can be active at a time. If an SG transfer is ongoing in the hardware, a submission of a simple transfer fails. If a simple transfer is ongoing in the hardware, a submission of an SG transfer is successful, however the SG transfer will not start until the simple transfer is done.</li>
+</ul>
+<p><b>Transactions</b></p>
+<p>The hardware supports two types of transfers, the simple DMA transfer and the scatter gather (SG) DMA transfer.</p>
+<p>A simple DMA transfer only needs source buffer address, destination buffer address and transfer length to do a DMA transfer. Only one transfer can be submitted to the hardware at a time.</p>
+<p>A SG DMA transfer requires setting up a buffer descriptor (BD), which keeps the transfer information, including source buffer address, destination buffer address, and transfer length. The hardware updates the BD for the completion status of the transfer. BDs that are connected to each other can be submitted to the hardware at once, therefore, the SG DMA transfer has better performance when the application is doing multiple transfers each time.</p>
+<p><b>Callback Function</b></p>
+<p>Each transfer, for which the application cares about its completion, should provide with the driver its callback function. The signature of the callback function is as the following:</p>
+<p>void XAxiCdma_CallBackFn(void *CallBackRef, u32 IrqMask, int *NumPtr);</p>
+<p>Where the CallBackRef is a reference pointer that the application passes to the driver along with the callback function. The driver passes IrqMask to the application when it calls this callback. The NumPtr is only used in SG mode to track how many BDs still left for this callback function.</p>
+<p>The callback function is set upon transfer submission:</p>
+<ul>
+<li><p class="startli">Simple transfer callback function setup:</p>
+<p class="startli"><b>Only set the callback function if in interrupt mode.</b></p>
+<p class="startli">For simple transfers, the callback function along with the callback reference pointer is passed to the driver through the submission of the simple transfer:</p>
+<p class="startli">XAxiCdma_SimpleTransfer(...)</p>
+</li>
+<li><p class="startli">SG transfer callback function setup: For SG transfers, the callback function and the callback reference pointer are set through the transfer submission call:</p>
+<p class="startli">XAxiCdma_BdRingToHw(...)</p>
+</li>
+</ul>
+<p><b>Simple Transfers</b></p>
+<p>For an application that only does one DMA transfer at a time, and the DMA engine is exclusively used by this application, simple DMA transfer is sufficient.</p>
+<p>Using the simple DMA transfer has the advantage of ease of use comparing to SG DMA transfer. For an individual DMA transfer, simple DMA transfer is also faster because of simplicity in software and hardware.</p>
+<p><b>Scatter Gather (SG) Transfers</b></p>
+<p>For an application that has multiple DMA transfers sometimes, or the DMA engine is shared by multiple applications, using SG DMA transfer yields better performance over all applications.</p>
+<p>The SG DMA transfer provides queuing of multiple transfers, therefore, it provides better performance because the hardware can continuously work on all submitted transfers without software intervention.</p>
+<p>The down side of using the SG DMA transfer is that you have to manage the memory for the buffer descriptors (BD), and setup BDs for the transfers.</p>
+<p><b>Interrupts</b></p>
+<p>The driver handles the interrupts.</p>
+<p>The completion of a transfer, that has a callback function associated with, will trigger the driver to call the callback function. The IrqMask that is passed through the callback function notifies the application about the completion status of the transfer.</p>
+<p><b>Interrupt Coalescing for SG Transfers</b></p>
+<p>For SG transfers, the application can program the interrupt coalescing threshold to reduce the frequency of interrupts. If the number of transfers does not match well with the interrupt coalescing threshold, the completion of the last transfer will not trigger the completion interrupt. However, after the specified delay count time, the delay interrupt will fire.</p>
+<p>By default, the interrupt threshold for the hardware is one, which is one interrupt per BD completion.</p>
+<p><b>Delay Interrupt for SG Transfers</b></p>
+<p>Delay interrupt is to signal the application about inactivity of transfers. If the delay interrupt is enabled, the delay timer starts counting down once a transfer has started. If the interval between transfers is longer than the delay counter, the delay interrupt is fired.</p>
+<p>By default, the delay counter is zero, which means the delay interrupt is disabled. To enable delay interrupt, the delay interrupt enable bit must be set and the delay counter must be set to a value between 1 to 255.</p>
+<p><b>BD management for SG DMA Transfers </b></p>
+<p>BD is shared by the software and the hardware. To use BD for SG DMA transfers, the application needs to use the driver API to do the following:</p>
+<ul>
+<li><p class="startli">Setup the BD ring:</p><ul>
+<li>XAxiCdma_BdRingCreate(...)</li>
+</ul>
+<p class="startli">Note that the memory for the BD ring is allocated and is later de-allocated by the application.</p>
+</li>
+<li>Request BD from the BD ring, more than one BDs can be requested at once:<ul>
+<li>XAxiCdma_BdRingAlloc(...)</li>
+</ul>
+</li>
+<li>Prepare BDs for the transfer, one BD at a time:<ul>
+<li>XAxiCdma_BdSetSrcBufAddr(...)</li>
+<li>XAxiCdma_BdSetDstBufAddr(...)</li>
+<li>XAxiCdma_BdSetLength(...)</li>
+</ul>
+</li>
+<li>Submit all prepared BDs to the hardware:<ul>
+<li>XAxiCdma_BdRingToHw(...)</li>
+</ul>
+</li>
+<li>Upon transfer completion, the application can request completed BDs from the hardware:<ul>
+<li>XAxiCdma_BdRingFromHw(...)</li>
+</ul>
+</li>
+<li>After the application has finished using the BDs, it should free the BDs back to the free pool:<ul>
+<li>XAxiCdma_BdRingFree(...)</li>
+</ul>
+</li>
+</ul>
+<p>The driver also provides API functions to get the status of a completed BD, along with get functions for other fields in the BD.</p>
+<p>The following two diagrams show the correct flow of BDs:</p>
+<p>The first diagram shows a complete cycle for BDs, starting from requesting the BDs to freeing the BDs. </p><pre></pre><pre>         <a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6" title="This function requests number of BDs from the BD ring. ">XAxiCdma_BdRingAlloc()</a>                   <a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68" title="This function tries to enqueue the number of BDs to the hardware. ">XAxiCdma_BdRingToHw()</a>
+ Free ------------------------&gt; Pre-process ----------------------&gt; Hardware
+                                                                    |
+  /|\                                                               |
+   |   <a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864" title="This function returns the BDs back to the free pool of the BD ring. ">XAxiCdma_BdRingFree()</a>                <a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc" title="This function tries to retrieve completed BDs from the hardware. ">XAxiCdma_BdRingFromHw()</a> |
+   +--------------------------- Post-process &lt;----------------------+</pre><pre> </pre><p>The second diagram shows when a DMA transfer is to be cancelled before enqueuing to the hardware, application can return the requested BDs to the free group using <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f" title="This function tries to free the number of BDs back to the ring. ">XAxiCdma_BdRingUnAlloc()</a>. </p><pre></pre><pre>         <a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f" title="This function tries to free the number of BDs back to the ring. ">XAxiCdma_BdRingUnAlloc()</a>
+   Free &lt;----------------------- Pre-process</pre><pre> </pre><p><b>Physical/Virtual Addresses</b></p>
+<p>Addresses for the transfer buffers are physical addresses.</p>
+<p>For SG transfers, the next BD pointer in a BD is also a physical address.</p>
+<p>However, application's reference to a BD and to the transfer buffers are through virtual addresses.</p>
+<p>The application is responsible to translate the virtual addresses of its transfer buffers to physical addresses before handing them to the driver.</p>
+<p>For systems where MMU is not used, or MMU is a direct mapping, then the physical address and the virtual address are the same.</p>
+<p><b>Cache Coherency</b></p>
+<p>To prevent cache and memory inconsistency:</p><ul>
+<li>Flush the transmit buffer range before the transfer</li>
+<li>Invalidate the receive buffer range before passing it to the hardware and before passing it to the application</li>
+</ul>
+<p>For SG transfers:</p><ul>
+<li>Flush the BDs once the preparation setup is done</li>
+<li>Invalidate the memory region for BDs when BDs are retrieved from the hardware.</li>
+</ul>
+<p><b>BD alignment for SG Transfers</b></p>
+<p>The hardware has requirement for the minimum alignment of the BDs, XAXICDMA_BD_MINIMUM_ALIGNMENT. It is OK to have an alignment larger than the required minimum alignment, however, it must be multiple of the minimum alignment. The alignment is passed into <a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5" title="This function creates the BD ring for the driver instance. ">XAxiCdma_BdRingCreate()</a>.</p>
+<p><b>Error Handling</b></p>
+<p>The hardware halts upon all error conditions. The driver will reset the hardware once the error occurs.</p>
+<p>The IrqMask argument in the callback function notifies the application about error conditions for the transfer.</p>
+<p><b>Mutual Exclusion</b></p>
+<p>The driver does not provide mutual exclusion mechanisms, it is up to the upper layer to handle this.</p>
+<p><b>Hardware Defaults &amp; Exclusive Use</b></p>
+<p>The hardware is in the following condition on start or after a reset:</p>
+<ul>
+<li>All interrupts are disabled.</li>
+<li>The engine is in simple mode.</li>
+<li>Interrupt coalescing counter is one.</li>
+<li>Delay counter is 0.</li>
+</ul>
+<p>The driver has exclusive use of the hardware registers and BDs. Accessing the hardware registers or the BDs should always go through the driver API functions.</p>
+<p><b>Hardware Features That User Should Be Aware of</b></p>
+<p>For performance reasons, the driver does not check the submission of transfers during run time. It is the user's responsibility to submit approrpiate transfers to the hardware. The following hardware features should be considerred when submitting a transfer:</p>
+<p>. Whether the hardware supports unaligned transfers, reflected through C_INCLUDE_DRE in system.mhs file. Submitting unaligned transfers while the hardware does not support it, causes errors upon transfer submission. Aligned transfer is in respect to word length, and word length is defined through the building parameter XPAR_AXI_CDMA_0_M_AXI_DATA_WIDTH.</p>
+<p>. Memory range of the transfer addresses. Transfer data to executable memory can crash the system.</p>
+<p>. Lite mode. To save hardware resources (drastically), you may select "lite" mode build of the hardware. However, with lite mode, the following features are _not_ supported:</p><ul>
+<li>Cross page boundary transfer. Each transfer must be restrictly inside one page; otherwise, slave error occurs.</li>
+<li>Unaligned transfer.</li>
+<li>Data width larger than 64 bit</li>
+<li>Maximum transfer length each time is limited to data_width * burst_len</li>
+</ul>
+<pre>
+ MODIFICATION HISTORY:</pre><pre>  . Updated the debug print on type casting to avoid warnings on u32. Cast
+    u32 to (unsigned int) to use the x format.</pre><pre> Ver   Who  Date     Changes
+ ----- ---- -------- -------------------------------------------------------
+ 1.00a jz   07/08/10 First release
+ 2.01a rkv  01/25/11 Added TCL script to generate Test App code for peripheral
+		       tests.
+		       Replaced with "\r\n" in place on "\n\r" in printf
+		       statements. Made some minor modifications for Doxygen
+ 2.02a srt  01/18/13 Added support for Key Hole feature (CR: 687217).
+		       Updated DDR base address for IPI designs (CR 703656).
+ 2.03a srt  04/13/13 Removed Warnings (CR 705006).
+		       Added logic to check if DDR is present in the test app
+		       tcl file. (CR 700806)
+ 3.0   adk  19/12/13 Updated as per the New Tcl API's
+ 4.0	 adk  27/07/15 Added support for 64-bit Addressing.
+ </pre> </div></div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
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+<div class="textblock">Here is a list of all modules:</div><div class="directory">
+<table class="directory">
+<tr id="row_0_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><a class="el" href="group__axicdma__v4__0.html" target="_self">Axicdma_v4_0</a></td><td class="desc">The implementation of the API of Xilinx CDMA engine </td></tr>
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+   <div id="projectname">axicdma
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+<a href="#func-members">Functions</a>  </div>
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+<div class="title">xaxicdma.c File Reference</div>  </div>
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+</div><!-- top -->
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
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+<div class="title">xaxicdma.h File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
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+</table>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
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+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__bd_8c.html

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+   <div id="projectname">axicdma
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+<div id="nav-path" class="navpath">
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+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">xaxicdma_bd.c File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
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+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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+<tr class="separator:ga37f4ecb500f691583798662804d5da18"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
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+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__bd_8h.html

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+<tr class="memitem:gabfe3657b7aad9487946d6bb436aeba18"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gabfe3657b7aad9487946d6bb436aeba18">XAxiCdma_BdRingNext</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
+<tr class="separator:gabfe3657b7aad9487946d6bb436aeba18"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga24af2a3eacaf56c972e6313683a3f7e0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga24af2a3eacaf56c972e6313683a3f7e0">XAxiCdma_BdRingPrev</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdPtr)</td></tr>
+<tr class="separator:ga24af2a3eacaf56c972e6313683a3f7e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab36598e09c09ffa680b6c0f207baf9f5"><td class="memItemLeft" align="right" valign="top">LONG&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab36598e09c09ffa680b6c0f207baf9f5">XAxiCdma_BdRingCreate</a> (XAxiCdma *InstancePtr, UINTPTR PhysAddr, UINTPTR VirtAddr, u32 Alignment, int BdCount)</td></tr>
+<tr class="separator:gab36598e09c09ffa680b6c0f207baf9f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3183f9f25654d2a066c19213f29897be"><td class="memItemLeft" align="right" valign="top">LONG&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3183f9f25654d2a066c19213f29897be">XAxiCdma_BdRingClone</a> (XAxiCdma *InstancePtr, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *TemplateBdPtr)</td></tr>
+<tr class="separator:ga3183f9f25654d2a066c19213f29897be"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27dd0cdc27b7a724533db75336c4acc6"><td class="memItemLeft" align="right" valign="top">LONG&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga27dd0cdc27b7a724533db75336c4acc6">XAxiCdma_BdRingAlloc</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> **BdSetPtr)</td></tr>
+<tr class="separator:ga27dd0cdc27b7a724533db75336c4acc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9be6e4072c2a17f4519ffa9f9ec3332f"><td class="memItemLeft" align="right" valign="top">LONG&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga9be6e4072c2a17f4519ffa9f9ec3332f">XAxiCdma_BdRingUnAlloc</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr)</td></tr>
+<tr class="separator:ga9be6e4072c2a17f4519ffa9f9ec3332f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c5cd26d9fd3311c2ccfa4253c587e68"><td class="memItemLeft" align="right" valign="top">LONG&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga3c5cd26d9fd3311c2ccfa4253c587e68">XAxiCdma_BdRingToHw</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr, XAxiCdma_CallBackFn CallBackFn, void *CallBackRef)</td></tr>
+<tr class="separator:ga3c5cd26d9fd3311c2ccfa4253c587e68"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafce6a8283bdec8b9c35169c7cd29f4dc"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gafce6a8283bdec8b9c35169c7cd29f4dc">XAxiCdma_BdRingFromHw</a> (XAxiCdma *InstancePtr, int BdLimit, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> **BdSetPtr)</td></tr>
+<tr class="separator:gafce6a8283bdec8b9c35169c7cd29f4dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab204e3f92e4edd3865ecf6b344f0b864"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gab204e3f92e4edd3865ecf6b344f0b864">XAxiCdma_BdRingFree</a> (XAxiCdma *InstancePtr, int NumBd, <a class="el" href="group__axicdma__v4__0.html#ga33f9ce1ca035334d63cd08d4cf26daea">XAxiCdma_Bd</a> *BdSetPtr)</td></tr>
+<tr class="separator:gab204e3f92e4edd3865ecf6b344f0b864"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+</div><!-- contents -->
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+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
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+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__g_8c.html

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XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__hw_8h.html

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axicdma
+   </div>
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+  </td>
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+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
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+      <li><a href="globals.html"><span>APIs</span></a></li>
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+    </ul>
+  </div>
+<div id="nav-path" class="navpath">
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+<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_e40864c8df86c6f5e700f41fa1051dbc.html">axicdma</a></li><li class="navelem"><a class="el" href="dir_1a47bfedaeca397204140b7ac95c62ff.html">src</a></li>  </ul>
+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">xaxicdma_hw.h File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gafcbfb5805f763b09fd93a283afa8a55e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gafcbfb5805f763b09fd93a283afa8a55e">XAxiCdma_ReadReg</a>(BaseAddress,  RegOffset)                      &#160;&#160;&#160;XAxiCdma_In32((BaseAddress) + (u32)(RegOffset))</td></tr>
+<tr class="separator:gafcbfb5805f763b09fd93a283afa8a55e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad6d4705f0ef363ca8d3dab00df58728f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#gad6d4705f0ef363ca8d3dab00df58728f">XAxiCdma_WriteReg</a>(BaseAddress,  RegOffset,  Data)                &#160;&#160;&#160;XAxiCdma_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))</td></tr>
+<tr class="separator:gad6d4705f0ef363ca8d3dab00df58728f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr><td colspan="2"><div class="groupHeader">Buffer Descriptor Alignment</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Maximum transfer length</div></td></tr>
+<tr><td colspan="2"><div class="groupText"><p>This is determined by hardware </p>
+</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Register offset definitions</div></td></tr>
+<tr><td colspan="2"><div class="groupText"><p>Register accesses are 32-bit. </p>
+</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_SR_OFFSET register</div></td></tr>
+<tr><td colspan="2"><div class="groupText"><p>This register reports status of a DMA channel, including idle state, errors, and interrupts </p>
+</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_CR_OFFSET register</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmask for descriptor</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmask for interrupts</div></td></tr>
+<tr><td colspan="2"><div class="groupText"><p>These masks are shared by XAXICDMA_CR_OFFSET register and XAXICDMA_SR_OFFSET register </p>
+</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmask and shift for delay counter and coalescing counter</div></td></tr>
+<tr><td colspan="2"><div class="groupText"><p>These masks are shared by XAXICDMA_CR_OFFSET register and XAXICDMA_SR_OFFSET register </p>
+</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Buffer Descriptor offsets</div></td></tr>
+<tr><td colspan="2"><div class="groupText"><p>The first 8 words are used by hardware.</p>
+<p>Cache operations are required for words used by hardware to enforce data consistency. All words after the 8th word are for software use only. </p>
+</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_BD_CTRL_OFFSET register</div></td></tr>
+<tr><td colspan="2"><div class="groupHeader">Bitmasks of XAXICDMA_BD_STS_OFFSET register</div></td></tr>
+</table>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
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+</html>

XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__i_8h.html

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XilinxProcessorIPLib/drivers/axicdma/doc/html/api/xaxicdma__intr_8c.html

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+</div>
+</div><!-- top -->
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">xaxicdma_intr.c File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga9f146fe224ea4c9a86477de3030dd79a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga9f146fe224ea4c9a86477de3030dd79a">XAxiCdma_IntrEnable</a> (XAxiCdma *InstancePtr, u32 Mask)</td></tr>
+<tr class="separator:ga9f146fe224ea4c9a86477de3030dd79a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1a269e884ce6e3552313521dea8032b6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axicdma__v4__0.html#ga1a269e884ce6e3552313521dea8032b6">XAxiCdma_IntrGetEnabled</a> (XAxiCdma *InstancePtr)</td></tr>
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+  <div class="summary">
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+<tr id="row_7_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span class="icondoc"></span><a class="el" href="xaxidma__hw_8h.html" target="_self">xaxidma_hw.h</a></td><td class="desc"></td></tr>
+<tr id="row_8_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span class="icondoc"></span><a class="el" href="xaxidma__porting__guide_8h.html" target="_self">xaxidma_porting_guide.h</a></td><td class="desc"></td></tr>
+<tr id="row_9_"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span class="icondoc"></span><a class="el" href="xaxidma__selftest_8c.html" target="_self">xaxidma_selftest.c</a></td><td class="desc"></td></tr>
+<tr id="row_10_" class="even"><td class="entry"><span style="width:16px;display:inline-block;">&#160;</span><span class="icondoc"></span><a class="el" href="xaxidma__sinit_8c.html" target="_self">xaxidma_sinit.c</a></td><td class="desc"></td></tr>
+</table>
+</div><!-- directory -->
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axidma/doc/html/api/functions.html

@@ -0,0 +1,130 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.10"/>
+<title>axidma: Data Fields</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axidma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Overview</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li class="current"><a href="functions.html"><span>Data&#160;Fields</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li class="current"><a href="functions.html"><span>All</span></a></li>
+      <li><a href="functions_vars.html"><span>Variables</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+<div class="textblock">Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:</div><ul>
+<li>AddrWidth
+: <a class="el" href="struct_x_axi_dma.html#a663f5757eabe6b1b8813ed5fdb0d0edb">XAxiDma</a>
+, <a class="el" href="struct_x_axi_dma___config.html#a6fc1c26fb40944182ff84e370e667eb0">XAxiDma_Config</a>
+</li>
+<li>AllCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3c928d2f36e8daf845a70afdae2573a4">XAxiDma_BdRing</a>
+</li>
+<li>BdaRestart
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a2519fd626856e7ab0d822adc46aab7d8">XAxiDma_BdRing</a>
+</li>
+<li>ChanBase
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a138fd282802e5f6ed3cb1d2505ede08a">XAxiDma_BdRing</a>
+</li>
+<li>FirstBdAddr
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a6d41078607d5a8165e67d6483e40e9ab">XAxiDma_BdRing</a>
+</li>
+<li>FirstBdPhysAddr
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#add2c7d765c8d95eeb9d0f94a54775528">XAxiDma_BdRing</a>
+</li>
+<li>FreeCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a51ec0929002582a900d404502e9a1622">XAxiDma_BdRing</a>
+</li>
+<li>FreeHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3e067ffdf2820a816f2d6dda6e3f9114">XAxiDma_BdRing</a>
+</li>
+<li>HasStsCntrlStrm
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7d35cb00bb50fff2e24c15f7d7d8dae0">XAxiDma_BdRing</a>
+</li>
+<li>HwCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#ab49406dd2d9ec65e3f38d1cc3c880391">XAxiDma_BdRing</a>
+</li>
+<li>HwHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#af097be199cf9d1d62cf32f775309a4f3">XAxiDma_BdRing</a>
+</li>
+<li>HwTail
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7abe8351de43377407c579cd158f2448">XAxiDma_BdRing</a>
+</li>
+<li>IsRxChannel
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a912bf38e61c8b03995ece842426b3ccf">XAxiDma_BdRing</a>
+</li>
+<li>LastBdAddr
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3743d05f930d7c04abb0693f2ef0b271">XAxiDma_BdRing</a>
+</li>
+<li>Length
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#af0b3fe5c9b9123209b3000e0d95193ed">XAxiDma_BdRing</a>
+</li>
+<li>PostCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#afd4e1620895f91a829354e131432d2b3">XAxiDma_BdRing</a>
+</li>
+<li>PostHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a92668e60e10a940428e68f816c64eab6">XAxiDma_BdRing</a>
+</li>
+<li>PreCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a68e8042d227f7a40821a478deb063215">XAxiDma_BdRing</a>
+</li>
+<li>PreHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a8a2958fb6be370d3cc29972f57203952">XAxiDma_BdRing</a>
+</li>
+<li>RingIndex
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#ac14f09fcd00f1869c8194d790f73d791">XAxiDma_BdRing</a>
+</li>
+<li>RunState
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a443e5c48e677e9a1a4e85a383eefc2be">XAxiDma_BdRing</a>
+</li>
+<li>Separation
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#aafd8e01bf65c7950235d8f21cf225e12">XAxiDma_BdRing</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axidma/doc/html/api/functions_vars.html

@@ -0,0 +1,130 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.10"/>
+<title>axidma: Data Fields - Variables</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axidma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Overview</span></a></li>
+      <li class="current"><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow2" class="tabs2">
+    <ul class="tablist">
+      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li class="current"><a href="functions.html"><span>Data&#160;Fields</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="functions.html"><span>All</span></a></li>
+      <li class="current"><a href="functions_vars.html"><span>Variables</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;<ul>
+<li>AddrWidth
+: <a class="el" href="struct_x_axi_dma.html#a663f5757eabe6b1b8813ed5fdb0d0edb">XAxiDma</a>
+, <a class="el" href="struct_x_axi_dma___config.html#a6fc1c26fb40944182ff84e370e667eb0">XAxiDma_Config</a>
+</li>
+<li>AllCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3c928d2f36e8daf845a70afdae2573a4">XAxiDma_BdRing</a>
+</li>
+<li>BdaRestart
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a2519fd626856e7ab0d822adc46aab7d8">XAxiDma_BdRing</a>
+</li>
+<li>ChanBase
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a138fd282802e5f6ed3cb1d2505ede08a">XAxiDma_BdRing</a>
+</li>
+<li>FirstBdAddr
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a6d41078607d5a8165e67d6483e40e9ab">XAxiDma_BdRing</a>
+</li>
+<li>FirstBdPhysAddr
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#add2c7d765c8d95eeb9d0f94a54775528">XAxiDma_BdRing</a>
+</li>
+<li>FreeCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a51ec0929002582a900d404502e9a1622">XAxiDma_BdRing</a>
+</li>
+<li>FreeHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3e067ffdf2820a816f2d6dda6e3f9114">XAxiDma_BdRing</a>
+</li>
+<li>HasStsCntrlStrm
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7d35cb00bb50fff2e24c15f7d7d8dae0">XAxiDma_BdRing</a>
+</li>
+<li>HwCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#ab49406dd2d9ec65e3f38d1cc3c880391">XAxiDma_BdRing</a>
+</li>
+<li>HwHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#af097be199cf9d1d62cf32f775309a4f3">XAxiDma_BdRing</a>
+</li>
+<li>HwTail
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a7abe8351de43377407c579cd158f2448">XAxiDma_BdRing</a>
+</li>
+<li>IsRxChannel
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a912bf38e61c8b03995ece842426b3ccf">XAxiDma_BdRing</a>
+</li>
+<li>LastBdAddr
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a3743d05f930d7c04abb0693f2ef0b271">XAxiDma_BdRing</a>
+</li>
+<li>Length
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#af0b3fe5c9b9123209b3000e0d95193ed">XAxiDma_BdRing</a>
+</li>
+<li>PostCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#afd4e1620895f91a829354e131432d2b3">XAxiDma_BdRing</a>
+</li>
+<li>PostHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a92668e60e10a940428e68f816c64eab6">XAxiDma_BdRing</a>
+</li>
+<li>PreCnt
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a68e8042d227f7a40821a478deb063215">XAxiDma_BdRing</a>
+</li>
+<li>PreHead
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a8a2958fb6be370d3cc29972f57203952">XAxiDma_BdRing</a>
+</li>
+<li>RingIndex
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#ac14f09fcd00f1869c8194d790f73d791">XAxiDma_BdRing</a>
+</li>
+<li>RunState
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#a443e5c48e677e9a1a4e85a383eefc2be">XAxiDma_BdRing</a>
+</li>
+<li>Separation
+: <a class="el" href="struct_x_axi_dma___bd_ring.html#aafd8e01bf65c7950235d8f21cf225e12">XAxiDma_BdRing</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals.html

@@ -0,0 +1,558 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.10"/>
+<title>axidma: APIs</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axidma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Overview</span></a></li>
+      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li class="current"><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li class="current"><a href="globals.html"><span>All</span></a></li>
+      <li><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li class="current"><a href="#index_x"><span>x</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+<div class="textblock">Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:</div>
+
+<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
+<li>XAxiDma
+: <a class="el" href="group__axidma__v9__0.html#gac08fe7cb6508a133a7ef036bba7df5b5">xaxidma.h</a>
+</li>
+<li>XAxiDma_Bd
+: <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">xaxidma_bd.h</a>
+</li>
+<li>XAXIDMA_BD_ADDRLEN_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga2b64a2b3eb88233498a9dd6a01068de6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_BUFA_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gaccd48ccba559728721eac77a4acc23d1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_BUFA_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga8bb69f2401305faa1d89fb8dc31e770f">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_BYTES_TO_CLEAR
+: <a class="el" href="group__axidma__v9__0.html#ga97ec6974f990aef9ea2298c1df5d72c3">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#gaa409dba5ec46ad5a31953e22c4d3333f">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_LEN_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gac3372d0a1625537d5b637f40ca20f52c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_TXEOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae9f4d328b9fb0bbdcadd6dc4c09fd4fa">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_TXSOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#gac279d381208f7f123ac07736702f8ff1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_DRE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gad40d36cf3371ad3d176835933dc85e4b">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_DRE_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga932a4ab54f38046e6635b9b87a584c79">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_DRE_SHIFT
+: <a class="el" href="group__axidma__v9__0.html#gac15dd4e956aa14d53a6f92544db468d1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_STSCNTRL_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga819b1b14cd4d386e588679105a8738a6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HW_NUM_BYTES
+: <a class="el" href="group__axidma__v9__0.html#gae8ddf1d33d85b0a7508b9a072d95bf14">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_ID_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga117e266cba3edbd1fd2f1e29305dcfc8">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_MCCTL_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga6daf74c6d99207a0d8ba91a049e661c6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_MINIMUM_ALIGNMENT
+: <a class="el" href="group__axidma__v9__0.html#ga7957d90570574e9c7a7ee308b290ecab">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_NDESC_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga730aa200407e3c7e38e6fad914ad1eb0">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_NDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga64e86b7df328bc7209a28152f86fd609">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_NUM_WORDS
+: <a class="el" href="group__axidma__v9__0.html#ga751f6662ab9baed908685eef30d322b8">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_START_CLEAR
+: <a class="el" href="group__axidma__v9__0.html#ga9eac2b100bcdf0aa763d1575f43c822b">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STRIDE_VSIZE_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga83d7d4d6e88ab44910242b61fcd7f8fe">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_ALL_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga8018932d7e9b743c4c5c76ab3d373de1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#gac433a776854849cbeaadcbed14132cb6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_COMPLETE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gadb7c73caf5e5007dcb56ea029d7390ba">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_DEC_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae79c77f87a9887510ea53480c1e9a998">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_INT_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga09e502148e375f2d695d6d5d6e1797d2">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gac71ad6cd79fc11e699bc10e3736fa08c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_RXEOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga91b0504c621f6c06b0df4752fe65ee3a">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_RXSOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga29915484fd9f840a8ab727cf83bbfe81">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_SLV_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga1f7727fc139a6b3100a5a17cb110efa6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR0_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gace0f0376ed9e0aad3d3e3c80254b20b4">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR1_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga7d9d62be0e0ed11b18f185b62dc72f67">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR2_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gadc83ff22099fdf61a5237965ce082504">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR3_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gae1c5981447fe5ac113a6da3c1e19d6ed">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR4_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga1ccae584923d0b6d0851a8bbae4528c9">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_WORDLEN_MASK
+: <a class="el" href="group__axidma__v9__0.html#gafcbd1a131c650a5d6ceee6be15008a77">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_WORDLEN_SHIFT
+: <a class="el" href="group__axidma__v9__0.html#ga3db5b1d09deab9660ff65c06136acbc5">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_BdClear
+: <a class="el" href="group__axidma__v9__0.html#ga6c47900232c9a5a5ba30a2c1a3343628">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetActualLength
+: <a class="el" href="group__axidma__v9__0.html#ga135667574b201437cfbdbecd8b348ee0">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetAppWord()
+: <a class="el" href="group__axidma__v9__0.html#ga9d2814e4249884e68fe9e6f370920ca4">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdGetARCache
+: <a class="el" href="group__axidma__v9__0.html#gaa5f7ba67cbbb678662e4b5d36c63d16e">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetARUser
+: <a class="el" href="group__axidma__v9__0.html#ga72d1616af8d996f12db78473a75b54b6">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetBufAddr
+: <a class="el" href="group__axidma__v9__0.html#gaf858d9659197442c9e96856c206423c6">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetCtrl
+: <a class="el" href="group__axidma__v9__0.html#ga495e780d704ecf548d3536b3bb8961a5">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetId
+: <a class="el" href="group__axidma__v9__0.html#gaf3f333d78d115724bfcac84746d8cfa6">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetLength
+: <a class="el" href="group__axidma__v9__0.html#ga9875ecb45b47664b70d74e8810fd5cf0">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetStride
+: <a class="el" href="group__axidma__v9__0.html#ga29a75b8f1de16a347544e37b48d8129c">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetSts
+: <a class="el" href="group__axidma__v9__0.html#gaf2448f2b2ac172da0d19adeae3cc4c48">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetTDest
+: <a class="el" href="group__axidma__v9__0.html#ga8c1e3dd04821568424ffc77caf11a851">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetTId
+: <a class="el" href="group__axidma__v9__0.html#gac14fa76311fd7e5fb59b81fd9e251f62">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetTUser
+: <a class="el" href="group__axidma__v9__0.html#ga7a2f9668058b7e4cdc89dffcce6086d3">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetVSize
+: <a class="el" href="group__axidma__v9__0.html#gad9f48ceb5b30d66bab23337edc35d2fe">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdHwCompleted
+: <a class="el" href="group__axidma__v9__0.html#ga20937b96fad07f286948f1af50590421">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdRead
+: <a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdRingAckIrq
+: <a class="el" href="group__axidma__v9__0.html#ga9e782e3715c1d2dd03e5d03434f47319">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingAlloc()
+: <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingBusy
+: <a class="el" href="group__axidma__v9__0.html#gaf7c291190c92ce93d72f95c5b04ef1d4">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingCheck()
+: <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingClone()
+: <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingCntCalc
+: <a class="el" href="group__axidma__v9__0.html#ga98555b607a9ec831dc6473e77515bb4b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingCreate()
+: <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingDumpRegs()
+: <a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingFree()
+: <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingFromHw()
+: <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingGetCnt
+: <a class="el" href="group__axidma__v9__0.html#gac62389e25e6775026cf1be6c383e665b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetCoalesce()
+: <a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingGetCurrBd
+: <a class="el" href="group__axidma__v9__0.html#ga21aa8dbf6eabf9146097d9b3cc91c574">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetError
+: <a class="el" href="group__axidma__v9__0.html#ga24cd47cdbfac0813e0d9caf966a1a3d2">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetFreeCnt
+: <a class="el" href="group__axidma__v9__0.html#ga415cf0c379fef0104f9f52881ead13a7">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetIrq
+: <a class="el" href="group__axidma__v9__0.html#ga7a9d2103e6d09fc3850b34a6386dc803">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetSr
+: <a class="el" href="group__axidma__v9__0.html#ga740fa349c7811de2b7bae5cf83eb445e">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingHwIsStarted
+: <a class="el" href="group__axidma__v9__0.html#ga766bed2454969636d827fb79faeeee97">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingIntDisable
+: <a class="el" href="group__axidma__v9__0.html#ga0269e07693c731cf7721c6f19f8eb69b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingIntEnable
+: <a class="el" href="group__axidma__v9__0.html#ga2518030938ab80081f6896fc5589682c">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingIntGetEnabled
+: <a class="el" href="group__axidma__v9__0.html#gadbb17169213d8af8b50e6dee7f7b6d8b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingMemCalc
+: <a class="el" href="group__axidma__v9__0.html#ga6899085c400b8f453381b305ac5521d9">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingNext
+: <a class="el" href="group__axidma__v9__0.html#ga4b7e75d1acf86428bd79fcd0d1c13745">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingPrev
+: <a class="el" href="group__axidma__v9__0.html#ga86c6d4b9c4f8766634d46a3078eadc8a">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingSetCoalesce()
+: <a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingSnapShotCurrBd
+: <a class="el" href="group__axidma__v9__0.html#ga0d79253861939c76e6d440ecde2b6edd">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingStart()
+: <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingToHw()
+: <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingUnAlloc()
+: <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdSetAppWord()
+: <a class="el" href="group__axidma__v9__0.html#gafc6434a23594c20c2b601f010a979e48">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetARCache
+: <a class="el" href="group__axidma__v9__0.html#gac7d8a383cd6d5aff6ee36c3a3db20cbf">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetARUser
+: <a class="el" href="group__axidma__v9__0.html#gae89253197f1aef6582d5cda3e49f8ead">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetBufAddr()
+: <a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetBufAddrMicroMode()
+: <a class="el" href="group__axidma__v9__0.html#ga8947514b5acfea6298d0f969f3d2b97e">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetCtrl()
+: <a class="el" href="group__axidma__v9__0.html#ga4eb2615ac89054e982c3f3c37f0ddb52">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetId
+: <a class="el" href="group__axidma__v9__0.html#ga53eeff085fd39a91b855939f13fe76f3">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetLength()
+: <a class="el" href="group__axidma__v9__0.html#ga4056035d8e7c90a68fa954c60d021e07">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetStride
+: <a class="el" href="group__axidma__v9__0.html#ga58961be41e3c0bc2694444bfe37b6c27">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetTDest
+: <a class="el" href="group__axidma__v9__0.html#ga5f9b3088c4e16c7f5584610a43b17462">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetTId
+: <a class="el" href="group__axidma__v9__0.html#gaa5bc321894b77ca6194c867018d9fe12">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetTUser
+: <a class="el" href="group__axidma__v9__0.html#gacf41c0ebe00870b6cdd34e46698e081b">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetVSize
+: <a class="el" href="group__axidma__v9__0.html#ga383b2c0667bf5bafa22922168895bd5e">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdWrite
+: <a class="el" href="group__axidma__v9__0.html#gab3b7d771208c01701b35bce165332a9f">xaxidma_bd.h</a>
+</li>
+<li>XAXIDMA_BUFFLEN_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gaa7ede468ba17bf106101d4850184dc74">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_Busy()
+: <a class="el" href="group__axidma__v9__0.html#gaff68c0ba3e9e25dfe5e39153301862f8">xaxidma.c</a>
+</li>
+<li>XAXIDMA_CDESC_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga00ee7a235750d8795961223455407051">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga24b47801eed2ab0ba326b8b40d24f2b1">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_CfgInitialize()
+: <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">xaxidma.c</a>
+</li>
+<li>XAXIDMA_COALESCE_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga280fd988ea7ec3fadfe7cf1293f39e36">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_CYCLIC_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga2d34bf268de2f2ef4d32351043835f68">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_KEYHOLE_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga8bdf83c8ba16d8217a2a6486a9b5b521">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga8534b07ed878f92d2062dc1680fb0391">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_RESET_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga33fda61f0837d37da36d3b72b90b0fba">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_RUNSTOP_MASK
+: <a class="el" href="group__axidma__v9__0.html#gab0ebdf6b7776e79941efe1325aac5aa9">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DELAY_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae3ad7ae6b5814b99de67bba06ec77ed1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DESC_LSB_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga170ce0e12eb12686a03e006610e2acd2">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DESTADDR_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga3a54e372851dbae81c33997ef2ba8d2f">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DESTADDR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga4e98e82ed389c23918315d833b457ea9">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_DumpBd()
+: <a class="el" href="group__axidma__v9__0.html#ga53983f629aba5b4ebf27f803a7a9284e">xaxidma_bd.c</a>
+</li>
+<li>XAXIDMA_ERR_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga4102192c408420feb5b7db14d47c6d5c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_DECODE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gaa19b93d226e97afd08d3869dc530b692">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_INTERNAL_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga87ac559811703a8ca33fc6b427913f2b">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SG_DEC_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga43ecb16ea8e8d09a33364a17610d8909">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SG_INT_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga1f9ef0d10a7456a25a4b244955659d65">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SG_SLV_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga0f0d25fd68716e868742115c9a28c18c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SLAVE_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga6d50743f6c9d6474561f6727eb956915">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_GetRxIndexRing
+: <a class="el" href="group__axidma__v9__0.html#gaf03e87b58cf2f9800e6260fda3745631">xaxidma.h</a>
+</li>
+<li>XAxiDma_GetRxRing
+: <a class="el" href="group__axidma__v9__0.html#ga6373ac3baa5365607f6727f4e2ece7a5">xaxidma.h</a>
+</li>
+<li>XAxiDma_GetTxRing
+: <a class="el" href="group__axidma__v9__0.html#ga9d91f29c6dc41f2106e097f1f9957a6e">xaxidma.h</a>
+</li>
+<li>XAXIDMA_HALTED_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga70671c3d8cd1e51c56723e298d268cce">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_HasSg
+: <a class="el" href="group__axidma__v9__0.html#ga18dd03026dd6c0ebd13526116c09ccae">xaxidma.h</a>
+</li>
+<li>XAXIDMA_IDLE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gaa3538e8c2a6e024641259c85368667f0">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_IntrAckIrq
+: <a class="el" href="group__axidma__v9__0.html#ga9ff0d2e5b50846e4b6a2d683283c10d5">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrDisable
+: <a class="el" href="group__axidma__v9__0.html#ga1936b497c0fa61d326807e5ed8dd572b">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrEnable
+: <a class="el" href="group__axidma__v9__0.html#gadac28afa26e2cb55bdada1ee3c016c52">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrGetEnabled
+: <a class="el" href="group__axidma__v9__0.html#gadba63ad7c0a784d569736a8d1eb7c367">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrGetIrq
+: <a class="el" href="group__axidma__v9__0.html#ga6a0eb17bcfcaf3331e01855d302f5f0e">xaxidma.h</a>
+</li>
+<li>XAXIDMA_IRQ_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga8347e41a5c01bdabefce9c8484a7ced1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_IRQ_DELAY_MASK
+: <a class="el" href="group__axidma__v9__0.html#gadc4a45d09bcbf852f29b880935d607dc">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_IRQ_ERROR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga6ceb68e74761910e4253795a9b4992cf">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_IRQ_IOC_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae420f2ad87e1e00456a6ee3a80d2480d">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_LookupConfig()
+: <a class="el" href="group__axidma__v9__0.html#ga0cbcf5259635ea3c336fe5413c98f75c">xaxidma.h</a>
+</li>
+<li>XAXIDMA_MICROMODE_MIN_BUF_ALIGN
+: <a class="el" href="group__axidma__v9__0.html#gaf0f7e862f42d26800868816eea2a949b">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_Pause()
+: <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">xaxidma.c</a>
+</li>
+<li>XAxiDma_ReadReg
+: <a class="el" href="group__axidma__v9__0.html#ga99f615c527035db697545614fff86bf2">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_Reset()
+: <a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">xaxidma.c</a>
+</li>
+<li>XAxiDma_ResetIsDone()
+: <a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">xaxidma.c</a>
+</li>
+<li>XAxiDma_Resume()
+: <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">xaxidma.c</a>
+</li>
+<li>XAXIDMA_RX_CDESC0_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gad80414a88feceb1da4b9f77096d1d590">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_CDESC0_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga79d2eca90f2554b8c893b2f9a70c795c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_NDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga6fc559cbc93b62195de6ecaf25492467">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gadfdc083e0b249c04624a66e700d7a7c4">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_TDESC0_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gaa9b5991af857e7bac763311fd917978d">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_TDESC0_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gadfa4d02f0dd1fd005c695e9977457722">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_SelectCyclicMode()
+: <a class="el" href="group__axidma__v9__0.html#ga2d93bfcf1c3e34cb9fc4a22da6148dc5">xaxidma.c</a>
+</li>
+<li>XAxiDma_SelectKeyHole()
+: <a class="el" href="group__axidma__v9__0.html#ga5becc8b0f9945af34e372ced2b37aebb">xaxidma.c</a>
+</li>
+<li>XAxiDma_Selftest()
+: <a class="el" href="group__axidma__v9__0.html#gad4ea3039216916336ae1c7598ff26afc">xaxidma.h</a>
+</li>
+<li>XAXIDMA_SGCTL_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gab26580f9b4a94b3ab1d373ddeab7b3b6">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_SimpleTransfer()
+: <a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">xaxidma.c</a>
+</li>
+<li>XAXIDMA_SR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga50d6957f8447d4eab9e444666730f692">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_SRCADDR_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gafaafc49751e690d818d604efe368c481">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_SRCADDR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga386fad6446792679302b362ed34022cf">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_StartBdRingHw()
+: <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">xaxidma_bdring.c</a>
+</li>
+<li>XAXIDMA_TDESC_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga6063ffb7cb46cdca589e6f31069f7758">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_TDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gac8626fb2bed7230a2c82a7e1db0ddd35">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_TX_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga88232281611059fd669f0339888cd44e">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_UpdateBdRingCDesc()
+: <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_WriteReg
+: <a class="el" href="group__axidma__v9__0.html#ga96d7b2834ae100f53627ca961393e9a2">xaxidma_hw.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_defs.html

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+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.10"/>
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+<script type="text/javascript" src="dynsections.js"></script>
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+<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
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+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axidma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Overview</span></a></li>
+      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li class="current"><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li class="current"><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li class="current"><a href="#index_x"><span>x</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
+<li>XAXIDMA_BD_ADDRLEN_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga2b64a2b3eb88233498a9dd6a01068de6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_BUFA_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gaccd48ccba559728721eac77a4acc23d1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_BUFA_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga8bb69f2401305faa1d89fb8dc31e770f">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_BYTES_TO_CLEAR
+: <a class="el" href="group__axidma__v9__0.html#ga97ec6974f990aef9ea2298c1df5d72c3">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#gaa409dba5ec46ad5a31953e22c4d3333f">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_LEN_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gac3372d0a1625537d5b637f40ca20f52c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_TXEOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae9f4d328b9fb0bbdcadd6dc4c09fd4fa">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_CTRL_TXSOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#gac279d381208f7f123ac07736702f8ff1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_DRE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gad40d36cf3371ad3d176835933dc85e4b">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_DRE_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga932a4ab54f38046e6635b9b87a584c79">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_DRE_SHIFT
+: <a class="el" href="group__axidma__v9__0.html#gac15dd4e956aa14d53a6f92544db468d1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HAS_STSCNTRL_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga819b1b14cd4d386e588679105a8738a6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_HW_NUM_BYTES
+: <a class="el" href="group__axidma__v9__0.html#gae8ddf1d33d85b0a7508b9a072d95bf14">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_ID_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga117e266cba3edbd1fd2f1e29305dcfc8">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_MCCTL_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga6daf74c6d99207a0d8ba91a049e661c6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_MINIMUM_ALIGNMENT
+: <a class="el" href="group__axidma__v9__0.html#ga7957d90570574e9c7a7ee308b290ecab">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_NDESC_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga730aa200407e3c7e38e6fad914ad1eb0">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_NDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga64e86b7df328bc7209a28152f86fd609">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_NUM_WORDS
+: <a class="el" href="group__axidma__v9__0.html#ga751f6662ab9baed908685eef30d322b8">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_START_CLEAR
+: <a class="el" href="group__axidma__v9__0.html#ga9eac2b100bcdf0aa763d1575f43c822b">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STRIDE_VSIZE_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga83d7d4d6e88ab44910242b61fcd7f8fe">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_ALL_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga8018932d7e9b743c4c5c76ab3d373de1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#gac433a776854849cbeaadcbed14132cb6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_COMPLETE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gadb7c73caf5e5007dcb56ea029d7390ba">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_DEC_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae79c77f87a9887510ea53480c1e9a998">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_INT_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga09e502148e375f2d695d6d5d6e1797d2">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gac71ad6cd79fc11e699bc10e3736fa08c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_RXEOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga91b0504c621f6c06b0df4752fe65ee3a">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_RXSOF_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga29915484fd9f840a8ab727cf83bbfe81">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_STS_SLV_ERR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga1f7727fc139a6b3100a5a17cb110efa6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR0_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gace0f0376ed9e0aad3d3e3c80254b20b4">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR1_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga7d9d62be0e0ed11b18f185b62dc72f67">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR2_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gadc83ff22099fdf61a5237965ce082504">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR3_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gae1c5981447fe5ac113a6da3c1e19d6ed">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_USR4_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga1ccae584923d0b6d0851a8bbae4528c9">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_WORDLEN_MASK
+: <a class="el" href="group__axidma__v9__0.html#gafcbd1a131c650a5d6ceee6be15008a77">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_BD_WORDLEN_SHIFT
+: <a class="el" href="group__axidma__v9__0.html#ga3db5b1d09deab9660ff65c06136acbc5">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_BdClear
+: <a class="el" href="group__axidma__v9__0.html#ga6c47900232c9a5a5ba30a2c1a3343628">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetActualLength
+: <a class="el" href="group__axidma__v9__0.html#ga135667574b201437cfbdbecd8b348ee0">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetARCache
+: <a class="el" href="group__axidma__v9__0.html#gaa5f7ba67cbbb678662e4b5d36c63d16e">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetARUser
+: <a class="el" href="group__axidma__v9__0.html#ga72d1616af8d996f12db78473a75b54b6">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetBufAddr
+: <a class="el" href="group__axidma__v9__0.html#gaf858d9659197442c9e96856c206423c6">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetCtrl
+: <a class="el" href="group__axidma__v9__0.html#ga495e780d704ecf548d3536b3bb8961a5">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetId
+: <a class="el" href="group__axidma__v9__0.html#gaf3f333d78d115724bfcac84746d8cfa6">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetLength
+: <a class="el" href="group__axidma__v9__0.html#ga9875ecb45b47664b70d74e8810fd5cf0">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetStride
+: <a class="el" href="group__axidma__v9__0.html#ga29a75b8f1de16a347544e37b48d8129c">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetSts
+: <a class="el" href="group__axidma__v9__0.html#gaf2448f2b2ac172da0d19adeae3cc4c48">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetTDest
+: <a class="el" href="group__axidma__v9__0.html#ga8c1e3dd04821568424ffc77caf11a851">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetTId
+: <a class="el" href="group__axidma__v9__0.html#gac14fa76311fd7e5fb59b81fd9e251f62">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetTUser
+: <a class="el" href="group__axidma__v9__0.html#ga7a2f9668058b7e4cdc89dffcce6086d3">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdGetVSize
+: <a class="el" href="group__axidma__v9__0.html#gad9f48ceb5b30d66bab23337edc35d2fe">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdHwCompleted
+: <a class="el" href="group__axidma__v9__0.html#ga20937b96fad07f286948f1af50590421">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdRead
+: <a class="el" href="group__axidma__v9__0.html#gaa738ffd392c7ae1e844fab340ba50fee">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdRingAckIrq
+: <a class="el" href="group__axidma__v9__0.html#ga9e782e3715c1d2dd03e5d03434f47319">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingBusy
+: <a class="el" href="group__axidma__v9__0.html#gaf7c291190c92ce93d72f95c5b04ef1d4">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingCntCalc
+: <a class="el" href="group__axidma__v9__0.html#ga98555b607a9ec831dc6473e77515bb4b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetCnt
+: <a class="el" href="group__axidma__v9__0.html#gac62389e25e6775026cf1be6c383e665b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetCurrBd
+: <a class="el" href="group__axidma__v9__0.html#ga21aa8dbf6eabf9146097d9b3cc91c574">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetError
+: <a class="el" href="group__axidma__v9__0.html#ga24cd47cdbfac0813e0d9caf966a1a3d2">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetFreeCnt
+: <a class="el" href="group__axidma__v9__0.html#ga415cf0c379fef0104f9f52881ead13a7">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetIrq
+: <a class="el" href="group__axidma__v9__0.html#ga7a9d2103e6d09fc3850b34a6386dc803">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingGetSr
+: <a class="el" href="group__axidma__v9__0.html#ga740fa349c7811de2b7bae5cf83eb445e">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingHwIsStarted
+: <a class="el" href="group__axidma__v9__0.html#ga766bed2454969636d827fb79faeeee97">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingIntDisable
+: <a class="el" href="group__axidma__v9__0.html#ga0269e07693c731cf7721c6f19f8eb69b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingIntEnable
+: <a class="el" href="group__axidma__v9__0.html#ga2518030938ab80081f6896fc5589682c">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingIntGetEnabled
+: <a class="el" href="group__axidma__v9__0.html#gadbb17169213d8af8b50e6dee7f7b6d8b">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingMemCalc
+: <a class="el" href="group__axidma__v9__0.html#ga6899085c400b8f453381b305ac5521d9">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingNext
+: <a class="el" href="group__axidma__v9__0.html#ga4b7e75d1acf86428bd79fcd0d1c13745">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingPrev
+: <a class="el" href="group__axidma__v9__0.html#ga86c6d4b9c4f8766634d46a3078eadc8a">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdRingSnapShotCurrBd
+: <a class="el" href="group__axidma__v9__0.html#ga0d79253861939c76e6d440ecde2b6edd">xaxidma_bdring.h</a>
+</li>
+<li>XAxiDma_BdSetARCache
+: <a class="el" href="group__axidma__v9__0.html#gac7d8a383cd6d5aff6ee36c3a3db20cbf">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetARUser
+: <a class="el" href="group__axidma__v9__0.html#gae89253197f1aef6582d5cda3e49f8ead">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetId
+: <a class="el" href="group__axidma__v9__0.html#ga53eeff085fd39a91b855939f13fe76f3">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetStride
+: <a class="el" href="group__axidma__v9__0.html#ga58961be41e3c0bc2694444bfe37b6c27">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetTDest
+: <a class="el" href="group__axidma__v9__0.html#ga5f9b3088c4e16c7f5584610a43b17462">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetTId
+: <a class="el" href="group__axidma__v9__0.html#gaa5bc321894b77ca6194c867018d9fe12">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetTUser
+: <a class="el" href="group__axidma__v9__0.html#gacf41c0ebe00870b6cdd34e46698e081b">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdSetVSize
+: <a class="el" href="group__axidma__v9__0.html#ga383b2c0667bf5bafa22922168895bd5e">xaxidma_bd.h</a>
+</li>
+<li>XAxiDma_BdWrite
+: <a class="el" href="group__axidma__v9__0.html#gab3b7d771208c01701b35bce165332a9f">xaxidma_bd.h</a>
+</li>
+<li>XAXIDMA_BUFFLEN_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gaa7ede468ba17bf106101d4850184dc74">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CDESC_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga00ee7a235750d8795961223455407051">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga24b47801eed2ab0ba326b8b40d24f2b1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_COALESCE_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga280fd988ea7ec3fadfe7cf1293f39e36">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_CYCLIC_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga2d34bf268de2f2ef4d32351043835f68">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_KEYHOLE_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga8bdf83c8ba16d8217a2a6486a9b5b521">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga8534b07ed878f92d2062dc1680fb0391">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_RESET_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga33fda61f0837d37da36d3b72b90b0fba">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_CR_RUNSTOP_MASK
+: <a class="el" href="group__axidma__v9__0.html#gab0ebdf6b7776e79941efe1325aac5aa9">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DELAY_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae3ad7ae6b5814b99de67bba06ec77ed1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DESC_LSB_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga170ce0e12eb12686a03e006610e2acd2">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DESTADDR_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga3a54e372851dbae81c33997ef2ba8d2f">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_DESTADDR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga4e98e82ed389c23918315d833b457ea9">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga4102192c408420feb5b7db14d47c6d5c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_DECODE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gaa19b93d226e97afd08d3869dc530b692">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_INTERNAL_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga87ac559811703a8ca33fc6b427913f2b">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SG_DEC_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga43ecb16ea8e8d09a33364a17610d8909">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SG_INT_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga1f9ef0d10a7456a25a4b244955659d65">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SG_SLV_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga0f0d25fd68716e868742115c9a28c18c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_ERR_SLAVE_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga6d50743f6c9d6474561f6727eb956915">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_GetRxIndexRing
+: <a class="el" href="group__axidma__v9__0.html#gaf03e87b58cf2f9800e6260fda3745631">xaxidma.h</a>
+</li>
+<li>XAxiDma_GetRxRing
+: <a class="el" href="group__axidma__v9__0.html#ga6373ac3baa5365607f6727f4e2ece7a5">xaxidma.h</a>
+</li>
+<li>XAxiDma_GetTxRing
+: <a class="el" href="group__axidma__v9__0.html#ga9d91f29c6dc41f2106e097f1f9957a6e">xaxidma.h</a>
+</li>
+<li>XAXIDMA_HALTED_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga70671c3d8cd1e51c56723e298d268cce">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_HasSg
+: <a class="el" href="group__axidma__v9__0.html#ga18dd03026dd6c0ebd13526116c09ccae">xaxidma.h</a>
+</li>
+<li>XAXIDMA_IDLE_MASK
+: <a class="el" href="group__axidma__v9__0.html#gaa3538e8c2a6e024641259c85368667f0">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_IntrAckIrq
+: <a class="el" href="group__axidma__v9__0.html#ga9ff0d2e5b50846e4b6a2d683283c10d5">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrDisable
+: <a class="el" href="group__axidma__v9__0.html#ga1936b497c0fa61d326807e5ed8dd572b">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrEnable
+: <a class="el" href="group__axidma__v9__0.html#gadac28afa26e2cb55bdada1ee3c016c52">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrGetEnabled
+: <a class="el" href="group__axidma__v9__0.html#gadba63ad7c0a784d569736a8d1eb7c367">xaxidma.h</a>
+</li>
+<li>XAxiDma_IntrGetIrq
+: <a class="el" href="group__axidma__v9__0.html#ga6a0eb17bcfcaf3331e01855d302f5f0e">xaxidma.h</a>
+</li>
+<li>XAXIDMA_IRQ_ALL_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga8347e41a5c01bdabefce9c8484a7ced1">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_IRQ_DELAY_MASK
+: <a class="el" href="group__axidma__v9__0.html#gadc4a45d09bcbf852f29b880935d607dc">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_IRQ_ERROR_MASK
+: <a class="el" href="group__axidma__v9__0.html#ga6ceb68e74761910e4253795a9b4992cf">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_IRQ_IOC_MASK
+: <a class="el" href="group__axidma__v9__0.html#gae420f2ad87e1e00456a6ee3a80d2480d">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_MICROMODE_MIN_BUF_ALIGN
+: <a class="el" href="group__axidma__v9__0.html#gaf0f7e862f42d26800868816eea2a949b">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_ReadReg
+: <a class="el" href="group__axidma__v9__0.html#ga99f615c527035db697545614fff86bf2">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_CDESC0_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gad80414a88feceb1da4b9f77096d1d590">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_CDESC0_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga79d2eca90f2554b8c893b2f9a70c795c">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_NDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga6fc559cbc93b62195de6ecaf25492467">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gadfdc083e0b249c04624a66e700d7a7c4">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_TDESC0_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gaa9b5991af857e7bac763311fd917978d">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_RX_TDESC0_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gadfa4d02f0dd1fd005c695e9977457722">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_SGCTL_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gab26580f9b4a94b3ab1d373ddeab7b3b6">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_SR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga50d6957f8447d4eab9e444666730f692">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_SRCADDR_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gafaafc49751e690d818d604efe368c481">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_SRCADDR_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga386fad6446792679302b362ed34022cf">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_TDESC_MSB_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga6063ffb7cb46cdca589e6f31069f7758">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_TDESC_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#gac8626fb2bed7230a2c82a7e1db0ddd35">xaxidma_hw.h</a>
+</li>
+<li>XAXIDMA_TX_OFFSET
+: <a class="el" href="group__axidma__v9__0.html#ga88232281611059fd669f0339888cd44e">xaxidma_hw.h</a>
+</li>
+<li>XAxiDma_WriteReg
+: <a class="el" href="group__axidma__v9__0.html#ga96d7b2834ae100f53627ca961393e9a2">xaxidma_hw.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

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+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axidma
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+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
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+      <li class="current"><a href="globals.html"><span>APIs</span></a></li>
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+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li class="current"><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li class="current"><a href="#index_x"><span>x</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_x"></a>- x -</h3><ul>
+<li>XAxiDma_BdGetAppWord()
+: <a class="el" href="group__axidma__v9__0.html#ga9d2814e4249884e68fe9e6f370920ca4">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdRingAlloc()
+: <a class="el" href="group__axidma__v9__0.html#ga44003cd704b7d4868d1dc00bb433a91f">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingCheck()
+: <a class="el" href="group__axidma__v9__0.html#ga64cf3c732bc803da742c256ab6372e0e">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingClone()
+: <a class="el" href="group__axidma__v9__0.html#gad044df5bd676a71226411ba7f78ef20b">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingCreate()
+: <a class="el" href="group__axidma__v9__0.html#ga5c6d6f492642dd355478c3a853556d6b">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingDumpRegs()
+: <a class="el" href="group__axidma__v9__0.html#gaffa661a9a2467c1e274842c147531cea">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingFree()
+: <a class="el" href="group__axidma__v9__0.html#gad2ac76e5a39486896cd484e51d2898c7">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingFromHw()
+: <a class="el" href="group__axidma__v9__0.html#ga1e5d328b4d4a247d1530fac3efe4c59c">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingGetCoalesce()
+: <a class="el" href="group__axidma__v9__0.html#ga0d3794bbccf028da8e94407d061dfc68">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingSetCoalesce()
+: <a class="el" href="group__axidma__v9__0.html#gaaebba5c661e04485582e887e74dbeb94">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingStart()
+: <a class="el" href="group__axidma__v9__0.html#gaafd18a1df185c30b4745c147e3295ac3">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingToHw()
+: <a class="el" href="group__axidma__v9__0.html#gaac81111b373e373be7dd3989fffffe7b">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdRingUnAlloc()
+: <a class="el" href="group__axidma__v9__0.html#gac58b1ab7a89890142baf67211772d3ce">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_BdSetAppWord()
+: <a class="el" href="group__axidma__v9__0.html#gafc6434a23594c20c2b601f010a979e48">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetBufAddr()
+: <a class="el" href="group__axidma__v9__0.html#gac1a9cb01ba6cd686ee08245f5e08cb22">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetBufAddrMicroMode()
+: <a class="el" href="group__axidma__v9__0.html#ga8947514b5acfea6298d0f969f3d2b97e">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetCtrl()
+: <a class="el" href="group__axidma__v9__0.html#ga4eb2615ac89054e982c3f3c37f0ddb52">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_BdSetLength()
+: <a class="el" href="group__axidma__v9__0.html#ga4056035d8e7c90a68fa954c60d021e07">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_Busy()
+: <a class="el" href="group__axidma__v9__0.html#gaff68c0ba3e9e25dfe5e39153301862f8">xaxidma.c</a>
+</li>
+<li>XAxiDma_CfgInitialize()
+: <a class="el" href="group__axidma__v9__0.html#ga8026e76c90d891d21c9c355ff776cb77">xaxidma.c</a>
+</li>
+<li>XAxiDma_DumpBd()
+: <a class="el" href="group__axidma__v9__0.html#ga53983f629aba5b4ebf27f803a7a9284e">xaxidma_bd.c</a>
+</li>
+<li>XAxiDma_LookupConfig()
+: <a class="el" href="group__axidma__v9__0.html#ga0cbcf5259635ea3c336fe5413c98f75c">xaxidma.h</a>
+</li>
+<li>XAxiDma_Pause()
+: <a class="el" href="group__axidma__v9__0.html#gadb572b623215a7df62b1e0468e3bd68c">xaxidma.c</a>
+</li>
+<li>XAxiDma_Reset()
+: <a class="el" href="group__axidma__v9__0.html#ga5b7d1248ef065915fd8c9e8d5e00640f">xaxidma.c</a>
+</li>
+<li>XAxiDma_ResetIsDone()
+: <a class="el" href="group__axidma__v9__0.html#gaf73e1329e40c8ac1ae47a7d9c104af75">xaxidma.c</a>
+</li>
+<li>XAxiDma_Resume()
+: <a class="el" href="group__axidma__v9__0.html#ga847cd9a0255fcb444bce58b945de8574">xaxidma.c</a>
+</li>
+<li>XAxiDma_SelectCyclicMode()
+: <a class="el" href="group__axidma__v9__0.html#ga2d93bfcf1c3e34cb9fc4a22da6148dc5">xaxidma.c</a>
+</li>
+<li>XAxiDma_SelectKeyHole()
+: <a class="el" href="group__axidma__v9__0.html#ga5becc8b0f9945af34e372ced2b37aebb">xaxidma.c</a>
+</li>
+<li>XAxiDma_Selftest()
+: <a class="el" href="group__axidma__v9__0.html#gad4ea3039216916336ae1c7598ff26afc">xaxidma.h</a>
+</li>
+<li>XAxiDma_SimpleTransfer()
+: <a class="el" href="group__axidma__v9__0.html#ga32ca6099d7926297a4c17cdb4a19511b">xaxidma.c</a>
+</li>
+<li>XAxiDma_StartBdRingHw()
+: <a class="el" href="group__axidma__v9__0.html#ga7b38bc9220c391823219937580bd816f">xaxidma_bdring.c</a>
+</li>
+<li>XAxiDma_UpdateBdRingCDesc()
+: <a class="el" href="group__axidma__v9__0.html#ga39ee7d89e4453276d615849acad27fde">xaxidma_bdring.c</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>

XilinxProcessorIPLib/drivers/axidma/doc/html/api/globals_type.html

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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<meta name="generator" content="Doxygen 1.8.10"/>
+<title>axidma: APIs</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<link href="doxygen.css" rel="stylesheet" type="text/css" />
+<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 56px;">
+  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
+  <td id="projectalign" style="padding-left: 0.5em;">
+   <div id="projectname">axidma
+   </div>
+   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<!-- Generated by Doxygen 1.8.10 -->
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Overview</span></a></li>
+      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
+      <li class="current"><a href="globals.html"><span>APIs</span></a></li>
+      <li><a href="files.html"><span>File&#160;List</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li><a href="globals_func.html"><span>Functions</span></a></li>
+      <li class="current"><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div class="contents">
+&#160;<ul>
+<li>XAxiDma
+: <a class="el" href="group__axidma__v9__0.html#gac08fe7cb6508a133a7ef036bba7df5b5">xaxidma.h</a>
+</li>
+<li>XAxiDma_Bd
+: <a class="el" href="group__axidma__v9__0.html#ga11a02100a6c84e394caa41761ab7485c">xaxidma_bd.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
+  </ul>
+</div>
+</body>
+</html>